From: hadeshyp Date: Fri, 27 May 2011 11:34:15 +0000 (+0000) Subject: *** empty log message *** X-Git-Tag: oldGBE~114 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=4a362e8204fdafccbe9306e6f2452a60a6341bab;p=trbnet.git *** empty log message *** --- diff --git a/trb_net16_hub_streaming_port_sctrl.vhd b/trb_net16_hub_streaming_port_sctrl.vhd index 16d1051..052a689 100644 --- a/trb_net16_hub_streaming_port_sctrl.vhd +++ b/trb_net16_hub_streaming_port_sctrl.vhd @@ -10,14 +10,24 @@ use work.trb_net16_hub_func.all; -- Be careful when setting the MII_NUMBER and MII_IS_* generics! -- for MII_NUMBER=5 (4 downlinks, 1 uplink): --- MII_IS_UPLINK => (0,0,0,0,1,1,1,0,0,0,0,0,0,0,0,0,0); --- MII_IS_DOWNLINK => (1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0); --- MII_IS_UPLINK_ONLY => (0,0,0,0,0,1,1,0,0,0,0,0,0,0,0,0,0); -- port 0,1,2,3: downlinks to other FPGA -- port 4: LVL1/Data channel on uplink to CTS, but internal endpoint on SCTRL -- port 5: SCTRL channel on uplink to CTS -- port 6: SCTRL channel from GbE interface + + +--If the injected slow control should be visible to the network below this hub only: +-- MII_IS_UPLINK => (0,0,0,0,1,1,1,0,0,0,0,0,0,0,0,0,0); +-- MII_IS_DOWNLINK => (1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0); +-- MII_IS_UPLINK_ONLY => (0,0,0,0,0,1,1,0,0,0,0,0,0,0,0,0,0); + +--If injected slow control should also be visible upstream (This must be the ONLY slow control interface in this case!) +-- MII_IS_UPLINK => (0,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,0); +-- MII_IS_DOWNLINK => (1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0); +-- MII_IS_UPLINK_ONLY => (0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0); + + entity trb_net16_hub_streaming_port_sctrl is generic( --hub control