From: hadeshyp Date: Wed, 28 Apr 2010 16:54:15 +0000 (+0000) Subject: *** empty log message *** X-Git-Tag: oldGBE~290 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=4aa50e23f2f6f9ffa59beccf5f13d36618ec093c;p=trbnet.git *** empty log message *** --- diff --git a/pinout/TRB_HUB2_FPGA1.lpf b/pinout/TRB_HUB2_FPGA1.lpf index c509eb6..d4c1c88 100755 --- a/pinout/TRB_HUB2_FPGA1.lpf +++ b/pinout/TRB_HUB2_FPGA1.lpf @@ -30,6 +30,8 @@ BLOCK ASYNCPATHS ; LOCATE COMP "RESET_N" SITE "B17"; LOCATE COMP "SUPPL_RESET_N" SITE "A17"; + IOBUF PORT "RESET_N" IO_TYPE=LVTTL33 PULLMODE=UP ; + IOBUF PORT "SUPPL_RESET_N" IO_TYPE=LVTTL33 PULLMODE=UP ; ######################################### # Connection to TRB diff --git a/trb_net16_endpoint_hades_full.vhd b/trb_net16_endpoint_hades_full.vhd index e9ee71c..e3b9e52 100644 --- a/trb_net16_endpoint_hades_full.vhd +++ b/trb_net16_endpoint_hades_full.vhd @@ -243,8 +243,10 @@ architecture trb_net16_endpoint_hades_full_arch of trb_net16_endpoint_hades_full signal temperature : std_logic_vector(11 downto 0); signal got_timing_trigger : std_logic; + signal got_timingless_trigger : std_logic; signal trigger_number_match : std_logic; signal buf_TIMER_TICKS_OUT : std_logic_vector(1 downto 0); + signal timing_trigger_missing : std_logic; signal buf_LVL1_VALID_TIMING_TRG_OUT : std_logic; signal buf_LVL1_VALID_NOTIMING_TRG_OUT : std_logic; @@ -743,17 +745,13 @@ begin ------------------------------------------------- proc_gen_common_stat_regs : process(REGIO_COMMON_STAT_REG_IN, trigger_number_match, temperature, int_trigger_num) begin - buf_COMMON_STAT_REG_IN(3 downto 0) <= REGIO_COMMON_STAT_REG_IN(3 downto 0); + buf_COMMON_STAT_REG_IN <= REGIO_COMMON_STAT_REG_IN; buf_COMMON_STAT_REG_IN(4) <= not trigger_number_match; - buf_COMMON_STAT_REG_IN(19 downto 5) <= REGIO_COMMON_STAT_REG_IN(19 downto 5); - if REGIO_USE_1WIRE_INTERFACE = c_NO then - buf_COMMON_STAT_REG_IN(31 downto 20) <= REGIO_COMMON_STAT_REG_IN(31 downto 20); - else + buf_COMMON_STAT_REG_IN(8) <= timing_trigger_missing; + if REGIO_USE_1WIRE_INTERFACE = c_YES then buf_COMMON_STAT_REG_IN(31 downto 20) <= temperature; end if; buf_COMMON_STAT_REG_IN(47 downto 32) <= int_trigger_num; - buf_COMMON_STAT_REG_IN(REGIO_COMMON_STAT_REG_IN'left downto 48) <= - REGIO_COMMON_STAT_REG_IN(REGIO_COMMON_STAT_REG_IN'left downto 48); end process; ------------------------------------------------- @@ -797,26 +795,30 @@ begin if reset_no_link = '1' or LVL1_TRG_RECEIVED_OUT_falling = '1' then got_timing_trigger <= '0'; - elsif TRG_TIMING_TRG_RECEIVED_IN = '1' or - (LVL1_TRG_RECEIVED_OUT_rising = '1' and buf_LVL1_TRG_TYPE_OUT >= x"8" and buf_LVL1_TRG_INFORMATION_OUT(7) = '1') then + got_timingless_trigger <= '0'; + elsif TRG_TIMING_TRG_RECEIVED_IN = '1' then got_timing_trigger <= '1'; + elsif (LVL1_TRG_RECEIVED_OUT_rising = '1' and buf_LVL1_TRG_TYPE_OUT >= x"8" and buf_LVL1_TRG_INFORMATION_OUT(7) = '1') then + got_timingless_trigger <= '1'; end if; end if; end process; - proc_gen_lvl1_error_pattern : process(LVL1_ERROR_PATTERN_IN, trigger_number_match, got_timing_trigger ) + proc_gen_lvl1_error_pattern : process(LVL1_ERROR_PATTERN_IN, trigger_number_match, got_timing_trigger,got_timingless_trigger ) begin buf_LVL1_ERROR_PATTERN_IN <= LVL1_ERROR_PATTERN_IN; buf_LVL1_ERROR_PATTERN_IN(16) <= not trigger_number_match or LVL1_ERROR_PATTERN_IN(16); - buf_LVL1_ERROR_PATTERN_IN(17) <= not got_timing_trigger or LVL1_ERROR_PATTERN_IN(17); + buf_LVL1_ERROR_PATTERN_IN(17) <= (not got_timing_trigger and not got_timingless_trigger) or LVL1_ERROR_PATTERN_IN(17); end process; buf_LVL1_VALID_TIMING_TRG_OUT <= TRG_TIMING_TRG_RECEIVED_IN; buf_LVL1_VALID_NOTIMING_TRG_OUT <= LVL1_TRG_RECEIVED_OUT_rising and not got_timing_trigger - and buf_LVL1_TRG_TYPE_OUT(3) and buf_LVL1_TRG_INFORMATION_OUT(7); + and buf_LVL1_TRG_TYPE_OUT(3) and buf_LVL1_TRG_INFORMATION_OUT(7); buf_LVL1_INVALID_TRG_OUT <= '0'; +--TODO: timing_trigger_missing; + ------------------------------------------------- -- Connect Outputs -------------------------------------------------