From: Jan Michel <j.michel@gsi.de>
Date: Fri, 24 Jan 2014 16:23:27 +0000 (+0100)
Subject: added correct reset for hades hub & other fifo in gbe
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=4b664ed0f256ad2c54a4641b414e4aa9ec162cbf;p=trb3.git

added correct reset for hades hub & other fifo in gbe
---

diff --git a/central_hub2/trb3_central.vhd b/central_hub2/trb3_central.vhd
index 4311744..c76a447 100644
--- a/central_hub2/trb3_central.vhd
+++ b/central_hub2/trb3_central.vhd
@@ -17,7 +17,8 @@ use work.version.all;
 
 entity trb3_central is
   generic(
-    FULL_UPLINK : integer := c_YES
+    FULL_UPLINK : integer := c_YES;
+    IS_HADES_HUB : integer := c_YES
     );
   port(
     --Clocks
@@ -142,6 +143,7 @@ architecture trb3_central_arch of trb3_central is
   attribute syn_preserve : boolean;
   
   constant NUM_PORTS : integer := 5 + FULL_UPLINK*3;
+  constant RESET_SFP_IN : integer := 4 + IS_HADES_HUB;
   
   signal clk_100_i   : std_logic; --clock for main logic, 100 MHz, via Clock Manager and internal PLL
   signal clk_200_i   : std_logic; --clock for logic at 200 MHz, via Clock Manager and bypassed PLL
@@ -219,7 +221,7 @@ THE_RESET_HANDLER : trb_net_reset_handler
     SYSCLK_IN       => clk_100_i,       -- PLL/DLL remastered clock
     PLL_LOCKED_IN   => pll_lock,        -- master PLL lock signal (async)
     RESET_IN        => '0',             -- general reset signal (SYSCLK)
-    TRB_RESET_IN    => med_stat_op(4*16+13), -- TRBnet reset signal (SYSCLK)
+    TRB_RESET_IN    => med_stat_op(RESET_SFP_IN*16+13), -- TRBnet reset signal (SYSCLK)
     CLEAR_OUT       => clear_i,         -- async reset out, USE WITH CARE!
     RESET_OUT       => reset_i,         -- synchronous reset out (SYSCLK)
     DEBUG_OUT       => open
diff --git a/trb3_gbe/trb3_central.prj b/trb3_gbe/trb3_central.prj
index d06e52e..e40bf6b 100644
--- a/trb3_gbe/trb3_central.prj
+++ b/trb3_gbe/trb3_central.prj
@@ -144,6 +144,7 @@ add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_response_construc
 add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4kx18x9.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_4kx8_ecp3.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_512x32x8.vhd"
+add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/ipcores_ecp3/fifo_32kx9_flags.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_ipu_interface.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe2_ecp3/trb_net16_gbe_event_constr.vhd"