From: Jan Michel <j.michel@gsi.de>
Date: Fri, 3 May 2013 11:18:48 +0000 (+0200)
Subject: started to work on padiwa configuration Flash
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=4e1038284dfb58e8fae40ec53cb215c16d601e3e;p=trb3.git

started to work on padiwa configuration Flash
---

diff --git a/wasa/cores/UFM_WB.v b/wasa/cores/UFM_WB.v
index a85c386..28fa548 100644
--- a/wasa/cores/UFM_WB.v
+++ b/wasa/cores/UFM_WB.v
@@ -44,8 +44,8 @@
 
 `timescale 1ns / 100ps
 `include "efb_define_def.v"
-`include "/d/jspc29/lattice/diamond/2.0/ispfpga/verilog/data/machxo2/GSR.v"
-`include "/d/jspc29/lattice/diamond/2.0/ispfpga/verilog/data/machxo2/PUR.v"
+//`include "/d/jspc29/lattice/diamond/2.0/ispfpga/verilog/data/machxo2/GSR.v"
+//`include "/d/jspc29/lattice/diamond/2.0/ispfpga/verilog/data/machxo2/PUR.v"
 
 module UFM_WB(
 				  input clk_i
diff --git a/wasa/panda_dirc_wasa.p2t b/wasa/panda_dirc_wasa.p2t
index 0e70172..a6bbb27 100644
--- a/wasa/panda_dirc_wasa.p2t
+++ b/wasa/panda_dirc_wasa.p2t
@@ -4,7 +4,7 @@
 -n 1
 -y
 -s 12
--t 11
+-t 12
 -c 1
 -e 2
 -m nodelist.txt
diff --git a/wasa/panda_dirc_wasa.vhd b/wasa/panda_dirc_wasa.vhd
index a1a94f0..40cf547 100644
--- a/wasa/panda_dirc_wasa.vhd
+++ b/wasa/panda_dirc_wasa.vhd
@@ -14,7 +14,7 @@ use machxo2.all;
 
 entity panda_dirc_wasa is
   generic(
-    PADIWA_FLAVOUR : integer := 2
+    PADIWA_FLAVOUR : integer := 1
     );
   port(
     CON        : out std_logic_vector(16 downto 1);
@@ -163,7 +163,7 @@ signal idram : idram_t;
 type ram_t is array(0 to 15) of std_logic_vector(15 downto 0);
 signal ram   : ram_t;
 
-signal pwm_i : std_logic_vector(31 downto 0);
+signal pwm_i : std_logic_vector(32 downto 1);
 signal INP_i     : std_logic_vector(15 downto 0);
 signal spi_reg00_i : std_logic_vector(15 downto 0);
 signal spi_reg10_i : std_logic_vector(15 downto 0);
@@ -261,22 +261,29 @@ clk_source: OSCH
 ---------------------------------------------------------------------------
 -- Input re-ordering
 ---------------------------------------------------------------------------
-gen_outputs_1 : if PADIWA_FLAVOUR = 2 generate
+
+gen_outputs_1 : if PADIWA_FLAVOUR = 1 generate
+  INP_i <= INP(16) & INP(8) & INP(15) & INP(7) & INP(14) & INP(6) & INP(13) & INP(5) & 
+           INP(12) & INP(4) & INP(11) & INP(3) & INP(10) & INP(2) & INP(9)  & INP(1);
+  PWM   <= pwm_i(16) & pwm_i(8) & pwm_i(15) & pwm_i(7) & pwm_i(14) & pwm_i(6) & pwm_i(13) & pwm_i(5) & 
+           pwm_i(12) & pwm_i(4) & pwm_i(11) & pwm_i(3) & pwm_i(10) & pwm_i(2) & pwm_i(9)  & pwm_i(1);
+end generate;
+
+
+gen_outputs_2 : if PADIWA_FLAVOUR = 2 generate
   INP_i <= INP;
-  PWM <= pwm_i(15 downto 0);
+  PWM <= pwm_i(16 downto 1);
 end generate;
 
 
-gen_outputs_2 : if PADIWA_FLAVOUR = 1 generate
-  INP_i <= INP(16) & INP(8) & INP(15) & INP(7) & INP(14) & INP(6) & INP(13) & INP(5) & 
-           INP(12) & INP(4) & INP(11) & INP(3) & INP(10) & INP(2) & INP(9)  & INP(1);
-  PWM <= pwm_i(15) & pwm_i(7) & pwm_i(14) & pwm_i(6) & pwm_i(13) & pwm_i(5) & pwm_i(12) & pwm_i(4) & 
-         pwm_i(11) & pwm_i(3) & pwm_i(10) & pwm_i(2) & pwm_i(9)  & pwm_i(1) & pwm_i(8)  & pwm_i(0);
+gen_outputs_3 : if PADIWA_FLAVOUR = 3 generate
+  INP_i <= INP(9)  & INP(1) & INP(10) & INP(2) & INP(11) & INP(3) & INP(12) & INP(4) & 
+           INP(13) & INP(5) & INP(14) & INP(6) & INP(15) & INP(7) & INP(16) & INP(8);
+  PWM   <= pwm_i(16) & pwm_i(8) & pwm_i(15) & pwm_i(7) & pwm_i(14) & pwm_i(6) & pwm_i(13) & pwm_i(5) & 
+           pwm_i(12) & pwm_i(4) & pwm_i(11) & pwm_i(3) & pwm_i(10) & pwm_i(2) & pwm_i(9)  & pwm_i(1);
 end generate;
 
-  
-  
-  
+   
 ---------------------------------------------------------------------------
 -- SPI Interface
 ---------------------------------------------------------------------------