From: palka Date: Mon, 5 May 2008 08:53:29 +0000 (+0000) Subject: *** empty log message *** X-Git-Tag: oldGBE~563 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=4fc81b99c74e9e1093dd8b3378f6dca73e66210b;p=trbnet.git *** empty log message *** --- diff --git a/optical_link/hub.vhd b/optical_link/hub.vhd index 6d68de3..4910dee 100644 --- a/optical_link/hub.vhd +++ b/optical_link/hub.vhd @@ -38,13 +38,15 @@ entity hub is SFP_INP_P : in std_logic_vector(15 downto 0); SFP_OUT_N : out std_logic_vector(15 downto 0); SFP_OUT_P : out std_logic_vector(15 downto 0); + --tempsens + FS_PE_11 : inout std_logic; --------------------------------------------------------------------------- -- sim --------------------------------------------------------------------------- - OPT_DATA_IN : in std_logic_vector(31 downto 0); - OPT_DATA_OUT : out std_logic_vector(31 downto 0); - OPT_DATA_VALID_IN : in std_logic_vector(1 downto 0); - OPT_DATA_VALID_OUT : out std_logic_vector(1 downto 0) + OPT_DATA_IN : in std_logic_vector(16*HOW_MANY_CHANNELS-1 downto 0); + OPT_DATA_OUT : out std_logic_vector(16*HOW_MANY_CHANNELS-1 downto 0); + OPT_DATA_VALID_IN : in std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); + OPT_DATA_VALID_OUT : out std_logic_vector(HOW_MANY_CHANNELS-1 downto 0) ); end hub; architecture hub of hub is @@ -218,7 +220,7 @@ architecture hub of hub is CV : in std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0); MED_DATA_IN : in std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0); TXD_SYNCH : out std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*64-1 downto 0); - TX_FORCE_DISP : out std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0); + TX_K : out std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0); MED_DATAREADY_IN : in std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); MED_DATAREADY_OUT : out std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); FLEXI_PCS_SYNCH_STATUS : out std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0); @@ -226,7 +228,10 @@ architecture hub of hub is MED_PACKET_NUM_OUT : out std_logic_vector(HOW_MANY_CHANNELS*2-1 downto 0); MED_READ_IN : in std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); MED_READ_OUT : out std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); - MED_ERROR_OUT : out std_logic_vector(HOW_MANY_CHANNELS*3-1 downto 0) + MED_ERROR_OUT : out std_logic_vector(HOW_MANY_CHANNELS*3-1 downto 0); + MED_STAT_OP : out std_logic_vector (HOW_MANY_CHANNELS*16-1 downto 0); + MED_CTRL_OP : in std_logic_vector (HOW_MANY_CHANNELS*16-1 downto 0) + ); end component; component pll_ref @@ -238,31 +243,33 @@ architecture hub of hub is end component; component trb_net16_hub_base generic ( - --general settings - MUX_SECURE_MODE : integer range 0 to 1 := c_NO; - --hub control - HUB_CTRL_CHANNELNUM : integer range 0 to 3 := 0;--c_SLOW_CTRL_CHANNEL; - HUB_CTRL_DEPTH : integer range 0 to 6 := c_FIFO_SMALL; - HUB_CTRL_REG_ADDR_WIDTH : integer range 1 to 7 := 4; - HUB_USED_CHANNELS : hub_channel_config_t := (c_YES,c_YES,c_YES,c_YES); - IBUF_SECURE_MODE : integer range 0 to 1 := c_NO; - --media interfaces - MII_NUMBER : integer range 2 to c_MAX_MII_PER_HUB := HOW_MANY_CHANNELS; - --each row is one media interface and each column is one channel. starting with 0,0, ending with 15,15 - MII_INIT_DEPTH : hub_iobuf_config_t := std_HUB_INIT_DEPTH; - MII_REPLY_DEPTH : hub_iobuf_config_t := std_HUB_REPLY_DEPTH; - -- settings for apis - API_NUMBER : integer range 0 to c_MAX_API_PER_HUB := 0; - API_CHANNELS : hub_api_config_t := (3,3,3,3,3,3,3,3); - --channel, each api is connected to - API_TYPE : hub_api_config_t := (0,0,0,0,0,0,0,0); - API_FIFO_TO_INT_DEPTH : hub_api_config_t := (1,1,1,1,1,1,1,1); - API_FIFO_TO_APL_DEPTH : hub_api_config_t := (1,1,1,1,1,1,1,1); - --trigger reading interfaces - TRG_NUMBER : integer range 0 to c_MAX_TRG_PER_HUB := 0; - TRG_SECURE_MODE : integer range 0 to 1 := c_NO; - TRG_CHANNELS : hub_api_config_t := (0,1,0,0,0,0,0,0) - ); + --general settings + MUX_SECURE_MODE : integer range 0 to 1 := c_NO; + --hub control + HUB_CTRL_CHANNELNUM : integer range 0 to 3 := 0;--c_SLOW_CTRL_CHANNEL; + HUB_CTRL_DEPTH : integer range 0 to 6 := c_FIFO_SMALL; + HUB_CTRL_REG_ADDR_WIDTH : integer range 1 to 7 := 4; + HUB_USED_CHANNELS : hub_channel_config_t := (c_YES,c_YES,c_YES,c_YES); + IBUF_SECURE_MODE : integer range 0 to 1 := c_NO; + INIT_ADDRESS : std_logic_vector(15 downto 0) := x"F00A"; + INIT_UNIQUE_ID : std_logic_vector(95 downto 0) := (others => '0'); + COMPILE_TIME : std_logic_vector(31 downto 0) := x"00000000"; + COMPILE_VERSION : std_logic_vector(15 downto 0) := x"0001"; + HARDWARE_VERSION : std_logic_vector(31 downto 0) := x"12345678"; + --media interfaces + MII_NUMBER : integer range 2 to c_MAX_MII_PER_HUB := HOW_MANY_CHANNELS; + MII_IBUF_DEPTH : hub_iobuf_config_t := std_HUB_IBUF_DEPTH; + -- settings for apis + API_NUMBER : integer range 0 to c_MAX_API_PER_HUB := 0; + API_CHANNELS : hub_api_config_t := (3,3,3,3,3,3,3,3); + API_TYPE : hub_api_config_t := (0,0,0,0,0,0,0,0); + API_FIFO_TO_INT_DEPTH : hub_api_config_t := (1,1,1,1,1,1,1,1); + API_FIFO_TO_APL_DEPTH : hub_api_config_t := (1,1,1,1,1,1,1,1); + --trigger reading interfaces + TRG_NUMBER : integer range 0 to c_MAX_TRG_PER_HUB := 0; + TRG_SECURE_MODE : integer range 0 to 1 := c_NO; + TRG_CHANNELS : hub_api_config_t := (0,1,0,0,0,0,0,0) + ); port ( CLK : in std_logic; RESET : in std_logic; @@ -276,10 +283,12 @@ architecture hub of hub is MED_PACKET_NUM_IN : in std_logic_vector (MII_NUMBER*c_NUM_WIDTH-1 downto 0); MED_READ_OUT : out std_logic_vector (MII_NUMBER-1 downto 0); MED_ERROR_IN : in std_logic_vector (MII_NUMBER*3-1 downto 0); + MED_STAT_OP : in std_logic_vector (MII_NUMBER*16-1 downto 0); + MED_CTRL_OP : out std_logic_vector (MII_NUMBER*16-1 downto 0); APL_DATA_IN : in std_logic_vector (API_NUMBER*c_DATA_WIDTH downto 0); APL_PACKET_NUM_IN : in std_logic_vector (API_NUMBER*c_NUM_WIDTH downto 0); - APL_WRITE_IN : in std_logic_vector (API_NUMBER downto 0); - APL_FIFO_FULL_OUT : out std_logic_vector (API_NUMBER downto 0); + APL_DATAREADY_IN : in std_logic_vector (API_NUMBER downto 0); + APL_READ_OUT : out std_logic_vector (API_NUMBER downto 0); APL_SHORT_TRANSFER_IN : in std_logic_vector (API_NUMBER downto 0); APL_DTYPE_IN : in std_logic_vector (API_NUMBER*4 downto 0); APL_ERROR_PATTERN_IN : in std_logic_vector (API_NUMBER*32 downto 0); @@ -299,6 +308,7 @@ architecture hub of hub is TRG_SEQNR_OUT : out std_logic_vector (TRG_NUMBER*8 downto 0); TRG_ERROR_PATTERN_IN : in std_logic_vector (TRG_NUMBER*32 downto 0); TRG_RELEASE_IN : in std_logic_vector (TRG_NUMBER downto 0); + ONEWIRE : inout std_logic; HUB_STAT_CHANNEL : out std_logic_vector (2**(c_MUX_WIDTH-1)*16-1 downto 0); HUB_STAT_GEN : out std_logic_vector (31 downto 0); MPLEX_CTRL : in std_logic_vector (MII_NUMBER*32-1 downto 0); @@ -318,6 +328,27 @@ architecture hub of hub is CLK : in std_logic; CLR : in std_logic); end component; + component trb_net_onewire + generic ( + USE_TEMPERATURE_READOUT : integer range 0 to 1; + CLK_PERIOD : integer); + port ( + CLK : in std_logic; + RESET : in std_logic; + ONEWIRE : inout std_logic; + DATA_OUT : out std_logic_vector(15 downto 0); + ADDR_OUT : out std_logic_vector(2 downto 0); + WRITE_OUT : out std_logic; + TEMP_OUT : out std_logic_vector(11 downto 0); + STAT : out std_logic_vector(31 downto 0)); + end component; + component edge_to_pulse + port ( + clock : in std_logic; + en_clk : in std_logic; + signal_in : in std_logic; + pulse : out std_logic); + end component; ----------------------------------------------------------------------------- -- FLEXI_PCS ----------------------------------------------------------------------------- @@ -329,7 +360,7 @@ architecture hub of hub is signal cv_i : std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0); signal txd_i : std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*64-1 downto 0); signal txd_synch_i : std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*64-1 downto 0); - signal tx_force_disp_i : std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0); + signal tx_k_i : std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0); signal rxb_pclk_a : std_logic_vector((HOW_MANY_CHANNELS+3)/4 -1 downto 0); signal rx_clk_i : std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*4-1 downto 0); signal flexi_pcs_synch_status_i : std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0); @@ -374,7 +405,12 @@ architecture hub of hub is signal med_data_in_i : std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0); signal med_packet_num_out_i : std_logic_vector(HOW_MANY_CHANNELS*2-1 downto 0); signal med_packet_num_in_i : std_logic_vector(HOW_MANY_CHANNELS*2-1 downto 0); - signal med_error_out_i : std_logic_vector(HOW_MANY_CHANNELS*3-1 downto 0); + signal med_error_out_i : std_logic_vector(HOW_MANY_CHANNELS*3-1 downto 0); + signal med_stat_op_i : std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0); + signal med_ctrl_op_i : std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0); + signal hub_stat_channel_i : std_logic_vector(2**(c_MUX_WIDTH-1)*16-1 downto 0); + signal hub_stat_gen_i : std_logic_vector(31 downto 0); + ----------------------------------------------------------------------------- -- other ----------------------------------------------------------------------------- @@ -388,33 +424,61 @@ architecture hub of hub is signal mplex_ctrl_i : std_logic_vector (HOW_MANY_CHANNELS*32-1 downto 0); signal word_counter_for_api_00 : std_logic_vector(1 downto 0); signal word_counter_for_api_01 : std_logic_vector(1 downto 0); + signal global_reset_i : std_logic; + signal global_reset_cnt : std_logic_vector(3 downto 0):=x"0"; + signal registered_signals : std_logic_vector(7 downto 0); + signal hub_register_0a_i_synch : std_logic_vector(7 downto 0); + signal hub_register_0e_and_0d_synch : std_logic_vector(15 downto 0); + signal test_signal : std_logic_vector(1 downto 0); + signal pulse_test : std_logic; begin - + GLOBAL_RESET: process(LVDS_CLK_200P,global_reset_cnt) + begin + if rising_edge(LVDS_CLK_200P) then + if global_reset_cnt < x"e" then + global_reset_cnt <= global_reset_cnt + 1; + global_reset_i <= '1'; + elsif global_reset_cnt = x"e" then + global_reset_i <= '0'; + global_reset_cnt <= x"e"; + else + global_reset_i <= '0'; + global_reset_cnt <= global_reset_cnt; + end if; + end if; + end process GLOBAL_RESET; REF_PLL: pll_ref port map ( clk => LVDS_CLK_200P, clkop => serdes_ref_clk, clkos => serdes_ref_clks, lock => serdes_ref_lock); - + TEST: edge_to_pulse + port map ( + clock => ref_pclk(0), + en_clk => '1', + signal_in => hub_register_0a_i(0), + pulse => pulse_test); + test_signal(1) <= pulse_test; + test_signal(0) <= pulse_test; QUAD_GENERATE : for bit_index in 0 to ((HOW_MANY_CHANNELS+3)/4-1) generate begin QUAD : serdes_fpga_ref_clk port map ( -- refclkp => SERDES_200P, -- refclkn => SERDES_200N, - rxrefclk => serdes_ref_clk,--LVDS_CLK_200P, - refclk => serdes_ref_clk,--LVDS_CLK_200P, + rxrefclk => LVDS_CLK_200P,--serdes_ref_clk,--LVDS_CLK_200P, + refclk => LVDS_CLK_200P,--serdes_ref_clk,--LVDS_CLK_200P, hdinp_0 => SFP_INP_P(bit_index*4+0), hdinn_0 => SFP_INP_N(bit_index*4+0), tclk_0 => ref_pclk(bit_index), rclk_0 => rx_clk_i(0+bit_index*4), tx_rst_0 => '0', rx_rst_0 => rx_rst_i(0+bit_index*4),--hub_register_0a_i(0), - txd_0 => txd_synch_i(15+bit_index*64 downto 0+bit_index*64), - tx_k_0 => "10", - tx_force_disp_0 => tx_force_disp_i(bit_index*8+1 downto 0+bit_index*8), - tx_disp_sel_0 => "00", + txd_0 => txd_synch_i(15+bit_index*64 downto 0+bit_index*64),--hub_register_0e_and_0d,--txd_synch_i(15+bit_index*64 downto 0+bit_index*64),--hub_register_0e_and_0d_synch,--txd_synch_i(15+bit_index*64 downto 0+bit_index*64),--hub_register_0e_and_0d_synch,--txd_synch_i(15+bit_index*64 downto 0+bit_index*64),--hub_register_0e_and_0d_synch,-- + tx_k_0 => tx_k_i(bit_index*8+1 downto 0+bit_index*8),--tx_force_disp_i(bit_index*8+1 downto 0+bit_index*8),--"10",--"10",--hub_register_0a_i_synch(1 downto 0),--"10", + tx_force_disp_0 => "00",--hub_register_0a_i(3 downto 2),--tx_force_disp_i(bit_index*8+1 downto 0+bit_index*8),--hub_register_0a_i_synch(3 downto 2),--tx_force_disp_i(bit_index*8+1 downto 0+bit_index*8),--hub_register_0a_i_synch(3 downto 2),--tx_force_disp_i(bit_index*8+1 downto 0+bit_index*8),--hub_register_0a_i_synch(3 downto 2),--tx_force_disp_i(bit_index*8+1 downto 0+bit_index*8), + tx_disp_sel_0 => "00",--hub_register_0a_i(5 downto 4), --"00",--hub_register_0a_i_synch(5 downto 4),--"00", tx_crc_init_0 => "00", word_align_en_0 => '1',--word_align_en(0+bit_index*4),--'1', mca_align_en_0 => '0', @@ -427,8 +491,8 @@ begin tx_rst_1 => '0', rx_rst_1 => rx_rst_i(1+bit_index*4), txd_1 => txd_synch_i(31+bit_index*64 downto 16+bit_index*64), - tx_k_1 => "10", - tx_force_disp_1 => tx_force_disp_i(3+bit_index*8 downto 2+bit_index*8), + tx_k_1 => tx_k_i(bit_index*8+1 downto 0+bit_index*8),--tx_force_disp_i(bit_index*8+1 downto 0+bit_index*8),--"10",--"10",--hub_register_0a_i_synch(1 downto 0),--"10", + tx_force_disp_1 => "00",--tx_k_i(3+bit_index*8 downto 2+bit_index*8), tx_disp_sel_1 => "00", tx_crc_init_1 => "00", word_align_en_1 => '1',--word_align_en(1+bit_index*4),--'1',-- @@ -442,8 +506,8 @@ begin tx_rst_2 => '0', rx_rst_2 => rx_rst_i(2+bit_index*4), txd_2 => txd_synch_i(47+bit_index*64 downto 32+bit_index*64), - tx_k_2 => "10", - tx_force_disp_2 => tx_force_disp_i(5+bit_index*8 downto 4+bit_index*8), + tx_k_2 => tx_k_i(5+bit_index*8 downto 4+bit_index*8),--"10", + tx_force_disp_2 => "00",-- tx_disp_sel_2 => "00", tx_crc_init_2 => "00", word_align_en_2 => '1',--word_align_en(2+bit_index*4),--'1', @@ -457,8 +521,8 @@ begin tx_rst_3 => '0', rx_rst_3 => rx_rst_i(3+bit_index*4), txd_3 => txd_synch_i(63+bit_index*64 downto 48+bit_index*64), - tx_k_3 => "10", - tx_force_disp_3 => tx_force_disp_i(7+bit_index*8 downto 6+bit_index*8), + tx_k_3 => tx_k_i(7+bit_index*8 downto 6+bit_index*8),--"10", + tx_force_disp_3 => "00", tx_disp_sel_3 => "00", tx_crc_init_3 => "00", word_align_en_3 => '1',--word_align_en(3+bit_index*4),--'1', @@ -521,154 +585,215 @@ begin ); end generate QUAD_GENERATE; word_align_en <= not rx_rst_i; - FLEXI_PCS_INT : flexi_PCS_synch - generic map ( - HOW_MANY_CHANNELS => HOW_MANY_CHANNELS) - port map ( - CLK => ref_pclk,--, - RX_CLK => rx_clk_i, - RESET => ADO_TTL(0), - RXD => rxd_i, - MED_DATA_OUT => med_data_out_i, - RX_K => rx_k_i, - RX_RST => rx_rst_i, - CV => cv_i, - MED_DATA_IN => med_data_in_i, - TXD_SYNCH => txd_synch_i, - TX_FORCE_DISP => tx_force_disp_i, - FLEXI_PCS_SYNCH_STATUS => flexi_pcs_synch_status_i, - MED_DATAREADY_IN => data_valid_in_i,--med_dataready_in_i, - MED_DATAREADY_OUT => med_dataready_out_i, - MED_PACKET_NUM_IN => med_packet_num_in_i, - MED_PACKET_NUM_OUT => med_packet_num_out_i, - MED_READ_IN => med_read_in_i, - MED_READ_OUT => med_read_out_i, - MED_ERROR_OUT => med_error_out_i - ); - med_read_in_i <= (others => '1'); --test - HUB_API: trb_net16_hub_base + FLEXI_PCS_INT : flexi_PCS_synch + generic map ( + HOW_MANY_CHANNELS => HOW_MANY_CHANNELS) port map ( - CLK => LVDS_CLK_200P, - RESET => ADO_TTL(0), - CLK_EN => '1', - MED_DATAREADY_OUT => med_dataready_in_i, - MED_DATA_OUT => med_data_in_i, - MED_PACKET_NUM_OUT => med_packet_num_in_i, - MED_READ_IN => med_read_out_i, - MED_DATAREADY_IN => med_dataready_out_i, - MED_DATA_IN => med_data_out_i, - MED_PACKET_NUM_IN => med_packet_num_out_i, - MED_READ_OUT => med_read_in_i, - MED_ERROR_IN => med_error_out_i, - APL_DATA_IN => (others => '0'), - APL_PACKET_NUM_IN => (others => '0'), - APL_WRITE_IN => (others => '0'), - APL_FIFO_FULL_OUT => open, - APL_SHORT_TRANSFER_IN => (others => '0'), - APL_DTYPE_IN => (others => '0'), - APL_ERROR_PATTERN_IN => (others => '0'), - APL_SEND_IN => (others => '0'), - APL_TARGET_ADDRESS_IN => (others => '0'), - APL_DATA_OUT => open, - APL_PACKET_NUM_OUT => open, - APL_TYP_OUT => open, - APL_DATAREADY_OUT => open, - APL_READ_IN => (others => '0'), - APL_RUN_OUT => open, - APL_MY_ADDRESS_IN => (others => '0'), - APL_SEQNR_OUT => open, - TRG_GOT_TRIGGER_OUT => open, - TRG_ERROR_PATTERN_OUT => open, - TRG_DTYPE_OUT => open, - TRG_SEQNR_OUT => open, - TRG_ERROR_PATTERN_IN => (others => '0'), - TRG_RELEASE_IN => (others => '0'), - HUB_STAT_CHANNEL => open, - HUB_STAT_GEN => open, - MPLEX_CTRL => mplex_ctrl_i, - MPLEX_STAT => open - ); + CLK => ref_pclk,--, + RX_CLK => rx_clk_i, + RESET => global_reset_i, + RXD => rxd_i, + MED_DATA_OUT => med_data_out_i, + RX_K => rx_k_i, + RX_RST => rx_rst_i, + CV => cv_i, + MED_DATA_IN => med_data_in_i, + TXD_SYNCH => txd_synch_i, + TX_K => tx_k_i, + FLEXI_PCS_SYNCH_STATUS => flexi_pcs_synch_status_i, + MED_DATAREADY_IN => med_dataready_in_i,--data_valid_in_i,--med_dataready_in_i, + MED_DATAREADY_OUT => med_dataready_out_i, + MED_PACKET_NUM_IN => med_packet_num_in_i, + MED_PACKET_NUM_OUT => med_packet_num_out_i, + MED_READ_IN => med_read_in_i, + MED_READ_OUT => med_read_out_i, + MED_ERROR_OUT => med_error_out_i, + MED_STAT_OP => med_stat_op_i, + MED_CTRL_OP => med_ctrl_op_i + ); +-- med_data_in_i(15 downto 0) <= hub_register_0e_and_0d; +-- med_read_in_i <= (others => '1'); --test - TRB_HUB_INT : trb_hub_interface - port map ( - CLK => ref_pclk(0), - RESET => ADO_TTL(0), - STROBE => ADO_TTL(9), - internal_data_in => ADO_TTL(18 downto 11), - internal_data_out => ADO_TTL(42 downto 35), - internal_address => ADO_TTL(34 downto 19), - internal_mode => ADO_TTL(10), - VALID_DATA_SENT => ADO_TTL(8), - HUB_REGISTER_00 => hub_register_00_i, - HUB_REGISTER_01 => hub_register_01_i, - HUB_REGISTER_02 => hub_register_02_i, - HUB_REGISTER_03 => hub_register_03_i, - HUB_REGISTER_04 => hub_register_04_i, - HUB_REGISTER_05 => hub_register_05_i, - HUB_REGISTER_06 => hub_register_06_i, - HUB_REGISTER_07 => hub_register_07_i, - HUB_REGISTER_08 => hub_register_08_i, - HUB_REGISTER_09 => hub_register_09_i, - HUB_REGISTER_0a => hub_register_0a_i, - HUB_REGISTER_0b => hub_register_0b_i, - HUB_REGISTER_0c => hub_register_0c_i, - HUB_REGISTER_0d => hub_register_0d_i, - HUB_REGISTER_0e => hub_register_0e_i, - HUB_REGISTER_0f => hub_register_0f_i, - HUB_REGISTER_10 => hub_register_10_i, - HUB_REGISTER_11 => hub_register_11_i, - HUB_REGISTER_12 => hub_register_12_i, - HUB_REGISTER_13 => hub_register_13_i, - HUB_REGISTER_14 => hub_register_14_i, - HUB_REGISTER_15 => hub_register_15_i, - HUB_REGISTER_16 => hub_register_16_i - ); - ADO_TTL(34 downto 9) <= (others => 'Z'); --- hub_register_00_i <=flexi_pcs_synch_status_i(7 downto 0); --- hub_register_01_i <= '0' & flexi_pcs_synch_status_i(18 downto 16) &'0' & flexi_pcs_synch_status_i(2 downto 0); --- hub_register_02_i <= rxd_i(7 downto 0); --; --rxd_1_a(15 downto 8); --- hub_register_03_i <= rxd_i(15 downto 8); --cv_counter_ch1; --- hub_register_04_i <= rxd_i(23 downto 16); --- -- hub_register_04_i<= rxd_synch_i(39 downto 32); --- hub_register_05_i <= rxd_i(31 downto 24); --- -- hub_register_10_i <= rxd_i(7+8*16 downto 0+8*16); --; --rxd_1_a(15 downto 8); --- -- hub_register_11_i <= rxd_i(23+8*16 downto 16+8*16); --cv_counter_ch1; --- -- hub_register_12_i <= rxd_i(39+8*16 downto 32+8*16); --- -- hub_register_13_i <= rxd_i(63+8*16 downto 56+8*16); --- -- hub_register_14_i <= flexi_pcs_synch_status_i(23+8*16 downto 16+8*16); --- -- hub_register_15_i <= flexi_pcs_synch_status_i(39+8*16 downto 32+8*16); --- -- hub_register_16_i <= flexi_pcs_synch_status_i(63+8*16 downto 56+8*16); + HUB_API: trb_net16_hub_base + port map ( + CLK => ref_pclk(0), + RESET => global_reset_i, + CLK_EN => '1', + MED_DATAREADY_OUT => med_dataready_in_i, + MED_DATA_OUT => med_data_in_i, + MED_PACKET_NUM_OUT => med_packet_num_in_i, + MED_READ_IN => med_read_out_i, + MED_DATAREADY_IN => med_dataready_out_i, + MED_DATA_IN => med_data_out_i, + MED_PACKET_NUM_IN => med_packet_num_out_i, + MED_READ_OUT => med_read_in_i, + MED_ERROR_IN => med_error_out_i, + MED_STAT_OP => med_stat_op_i, + MED_CTRL_OP => med_ctrl_op_i, + APL_DATA_IN => (others => '0'), + APL_PACKET_NUM_IN => (others => '0'), + APL_DATAREADY_IN => (others => '0'), + APL_READ_OUT => open, + APL_SHORT_TRANSFER_IN => (others => '0'), + APL_DTYPE_IN => (others => '0'), + APL_ERROR_PATTERN_IN => (others => '0'), + APL_SEND_IN => (others => '0'), + APL_TARGET_ADDRESS_IN => (others => '0'), + APL_DATA_OUT => open, + APL_PACKET_NUM_OUT => open, + APL_TYP_OUT => open, + APL_DATAREADY_OUT => open, + APL_READ_IN => (others => '0'), + APL_RUN_OUT => open, + APL_MY_ADDRESS_IN => (others => '0'), + APL_SEQNR_OUT => open, + TRG_GOT_TRIGGER_OUT => open, + TRG_ERROR_PATTERN_OUT => open, + TRG_DTYPE_OUT => open, + TRG_SEQNR_OUT => open, + TRG_ERROR_PATTERN_IN => (others => '0'), + TRG_RELEASE_IN => (others => '0'), + ONEWIRE => FS_PE_11, + HUB_STAT_CHANNEL => hub_stat_channel_i, + HUB_STAT_GEN => hub_stat_gen_i, + MPLEX_CTRL => mplex_ctrl_i, + MPLEX_STAT => open + ); + process (LVDS_CLK_200P, global_reset_i, med_dataready_out_i) + begin + if rising_edge(LVDS_CLK_200P) then + if global_reset_i = '1' then -- asynchronous reset (active low) + registered_signals(0) <= '0'; + elsif med_dataready_out_i(0) = '1' then + registered_signals(0) <= '1'; + else + registered_signals(0) <= registered_signals(0); + end if; + end if; + end process; + process (rx_clk_i(0), global_reset_i, rx_k_i(0)) + begin + if rising_edge(rx_clk_i(0)) then + if global_reset_i = '1' then -- asynchronous reset (active low) + registered_signals(1) <= '0'; + elsif rx_k_i(1 downto 0) = "00" and flexi_pcs_synch_status_i(3 downto 0) = x"6" then + registered_signals(1) <= '1'; + else + registered_signals(1) <= registered_signals(1); + end if; + end if; + end process; + process (rx_clk_i(0), global_reset_i,rx_k_i(1)) + begin + if rising_edge(rx_clk_i(0)) then + if global_reset_i = '1' then -- asynchronous reset (active low) + registered_signals(2) <= '0'; + elsif rx_k_i(1 downto 0) = "00" and flexi_pcs_synch_status_i(3 downto 0) > x"7" then + registered_signals(2) <= '1'; + else + registered_signals(2) <= registered_signals(2); + end if; + end if; + end process; + registered_signals(4 downto 3) <= rx_k_i(1) & rx_k_i(0); + TRB_HUB_INT : trb_hub_interface + port map ( + CLK => ref_pclk(0), + RESET => global_reset_i, + STROBE => ADO_TTL(9), + internal_data_in => ADO_TTL(18 downto 11), + internal_data_out => ADO_TTL(42 downto 35), + internal_address => ADO_TTL(34 downto 19), + internal_mode => ADO_TTL(10), + VALID_DATA_SENT => ADO_TTL(8), + HUB_REGISTER_00 => hub_register_00_i, + HUB_REGISTER_01 => hub_register_01_i, + HUB_REGISTER_02 => hub_register_02_i, + HUB_REGISTER_03 => hub_register_03_i, + HUB_REGISTER_04 => hub_register_04_i, + HUB_REGISTER_05 => hub_register_05_i, + HUB_REGISTER_06 => hub_register_06_i, + HUB_REGISTER_07 => hub_register_07_i, + HUB_REGISTER_08 => hub_register_08_i, + HUB_REGISTER_09 => hub_register_09_i, + HUB_REGISTER_0a => hub_register_0a_i, + HUB_REGISTER_0b => hub_register_0b_i, + HUB_REGISTER_0c => hub_register_0c_i, + HUB_REGISTER_0d => hub_register_0d_i, + HUB_REGISTER_0e => hub_register_0e_i, + HUB_REGISTER_0f => hub_register_0f_i, + HUB_REGISTER_10 => hub_register_10_i, + HUB_REGISTER_11 => hub_register_11_i, + HUB_REGISTER_12 => hub_register_12_i, + HUB_REGISTER_13 => hub_register_13_i, + HUB_REGISTER_14 => hub_register_14_i, + HUB_REGISTER_15 => hub_register_15_i, + HUB_REGISTER_16 => hub_register_16_i + ); + SYNCH_DATA: process (ref_pclk(0), global_reset_i) + begin -- process SYNCH_DATA + if falling_edge(ref_pclk(0)) then + if global_reset_i = '1' then + hub_register_0a_i_synch <= (others => '0'); + hub_register_0e_and_0d_synch <= (others => '0'); + else + hub_register_0a_i_synch <= hub_register_0a_i; + hub_register_0e_and_0d_synch <= hub_register_0e_and_0d; + end if; + end if; + end process SYNCH_DATA; + ADO_TTL(34 downto 9) <= (others => 'Z'); + hub_register_00_i <= flexi_pcs_synch_status_i(7 downto 0); + hub_register_01_i <= hub_stat_gen_i(15 downto 8); + hub_register_02_i <= rxd_i(7 downto 0); --; --rxd_1_a(15 downto 8); + hub_register_03_i <= rxd_i(15 downto 8); --cv_counter_ch1; + hub_register_04_i <= hub_stat_gen_i(7 downto 0); + -- hub_register_04_i<= rxd_synch_i(39 downto 32); + hub_register_05_i <= rxd_i(31 downto 24); + hub_register_10_i <= med_data_out_i(31 downto 24);--rxd_i(7+8*16 downto 0+8*16); --; --rxd_1_a(15 downto 8); + -- hub_register_11_i <= rxd_i(23+8*16 downto 16+8*16); --cv_counter_ch1; + -- hub_register_12_i <= rxd_i(39+8*16 downto 32+8*16); + -- hub_register_13_i <= rxd_i(63+8*16 downto 56+8*16); + -- hub_register_14_i <= flexi_pcs_synch_status_i(23+8*16 downto 16+8*16); + -- hub_register_15_i <= flexi_pcs_synch_status_i(39+8*16 downto 32+8*16); + -- hub_register_16_i <= flexi_pcs_synch_status_i(63+8*16 downto 56+8*16); --- hub_register_06_i <= flexi_pcs_synch_status_i(23 downto 16); --- -- hub_register_07_i <= flexi_pcs_synch_status_i(39 downto 32); --- -- hub_register_08_i <= flexi_pcs_synch_status_i(55 downto 48); --- -- hub_register_09_i <= x"0" & data_valid_out_i(3 downto 0); --- hub_register_0e_and_0d <= hub_register_0e_i & hub_register_0d_i; --- txd_i(15 downto 0) <= hub_register_0e_and_0d; --- txd_i(31 downto 16) <= hub_register_0e_and_0d; --- txd_i(47 downto 32) <= hub_register_0e_and_0d; --- txd_i(63 downto 48) <= hub_register_0e_and_0d; - --- -- txd_i(255 downto 64) <= hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & --- -- hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & --- -- hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d; --- data_valid_in_i(0) <= hub_register_0a_i(0); --- data_valid_in_i(1) <= hub_register_0a_i(1); --- data_valid_in_i(2) <= hub_register_0a_i(2); --- data_valid_in_i(3) <= hub_register_0a_i(3); --- data_valid_in_i(4) <= hub_register_0a_i(0); --- data_valid_in_i(5) <= hub_register_0a_i(1); --- data_valid_in_i(6) <= hub_register_0a_i(2); --- data_valid_in_i(7) <= hub_register_0a_i(3); --- data_valid_in_i(8) <= hub_register_0a_i(0); --- data_valid_in_i(9) <= hub_register_0a_i(1); --- data_valid_in_i(10) <= hub_register_0a_i(2); --- data_valid_in_i(11) <= hub_register_0a_i(3); --- data_valid_in_i(12) <= hub_register_0a_i(0); --- data_valid_in_i(13) <= hub_register_0a_i(1); --- data_valid_in_i(14) <= hub_register_0a_i(2); --- data_valid_in_i(15) <= hub_register_0a_i(3); + hub_register_06_i <= tx_k_i(1 downto 0) & med_error_out_i(5 downto 0); + hub_register_07_i <= hub_stat_gen_i(31 downto 24);--flexi_pcs_synch_status_i(39 downto 32); + hub_register_08_i <= hub_stat_gen_i(23 downto 16);--flexi_pcs_synch_status_i(55 downto 48); + hub_register_09_i <= med_data_out_i(23 downto 16);--x"0" & data_valid_out_i(3 downto 0); + hub_register_0e_and_0d <= hub_register_0e_i & hub_register_0d_i; +-- txd_i(15 downto 0) <= hub_register_0e_and_0d; +-- txd_i(31 downto 16) <= hub_register_0e_and_0d; +-- txd_i(47 downto 32) <= hub_register_0e_and_0d; +-- txd_i(63 downto 48) <= hub_register_0e_and_0d; + hub_register_11_i <= hub_stat_channel_i(7 downto 0);--flexi_pcs_synch_status_i(55 downto 48); + hub_register_12_i <= hub_stat_channel_i(15 downto 8);--flexi_pcs_synch_status_i(55 downto 48); + hub_register_13_i <= med_dataready_out_i(0)& med_dataready_in_i(0) & med_dataready_out_i(0)®istered_signals(4 downto 0); + hub_register_14_i <= flexi_pcs_synch_status_i (15 downto 8); + hub_register_15_i <= x"0" & med_packet_num_out_i(3 downto 0); + -- hub_register_13_i <= hub_stat_channel_i(23 downto 16);--flexi_pcs_synch_status_i(55 downto 48); + -- hub_register_14_i <= hub_stat_channel_i(31 downto 24);--flexi_pcs_synch_status_i(55 downto 48); + -- txd_i(255 downto 64) <= hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & + -- hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & + -- hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d; + data_valid_in_i(0) <= hub_register_0a_i(0); + data_valid_in_i(1) <= hub_register_0a_i(1); +-- data_valid_in_i(2) <= hub_register_0a_i(2); +-- data_valid_in_i(3) <= hub_register_0a_i(3); +-- data_valid_in_i(4) <= hub_register_0a_i(0); +-- data_valid_in_i(5) <= hub_register_0a_i(1); +-- data_valid_in_i(6) <= hub_register_0a_i(2); +-- data_valid_in_i(7) <= hub_register_0a_i(3); +-- data_valid_in_i(8) <= hub_register_0a_i(0); +-- data_valid_in_i(9) <= hub_register_0a_i(1); +-- data_valid_in_i(10) <= hub_register_0a_i(2); +-- data_valid_in_i(11) <= hub_register_0a_i(3); +-- data_valid_in_i(12) <= hub_register_0a_i(0); +-- data_valid_in_i(13) <= hub_register_0a_i(1); +-- data_valid_in_i(14) <= hub_register_0a_i(2); +-- data_valid_in_i(15) <= hub_register_0a_i(3); -- data_valid_in_i(15 downto 4) <= hub_register_0a_i(7 downto 0) & hub_register_0a_i(7 downto 4); @@ -706,22 +831,22 @@ begin DBAD <= ADO_TTL(11); DGOOD <= '1'; DINT <= '0'; - DWAIT <= ADO_TTL(0); + DWAIT <= global_reset_i; - CV_COUNTERaaa: process (LVDS_CLK_200P, ADO_TTL(0)) + CV_COUNTERaaa: process (LVDS_CLK_200P, global_reset_i) begin if rising_edge(LVDS_CLK_200P) then -- rising clock edge - if ADO_TTL(0) = '1' then -- asynchronous reset (active low) + if global_reset_i = '1' then -- asynchronous reset (active low) cv_counter <= (others => '0'); else cv_counter <= cv_counter + 1; end if; end if; end process CV_COUNTERaaa; - CV_COUNTERaab: process (ref_pclk(0), ADO_TTL(0)) + CV_COUNTERaab: process (ref_pclk(0), global_reset_i) begin if rising_edge(ref_pclk(0)) then -- rising clock edge - if ADO_TTL(0) = '1' then -- asynchronous reset (active low) + if global_reset_i = '1' then -- asynchronous reset (active low) cv_countera <= (others => '0'); else cv_countera <= cv_countera + 1;