From: Ingo Froehlich <ingo@nomail.fake>
Date: Tue, 22 Aug 2017 14:22:32 +0000 (+0200)
Subject: new dirich flash scheme, IF
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=522b85a1591f8750f621d94f44e7102a0ff5ec7d;p=dirich.git

new dirich flash scheme, IF
---

diff --git a/thresholds/compile.pl b/thresholds/compile.pl
index 3dfb1e0..8a19aa6 120000
--- a/thresholds/compile.pl
+++ b/thresholds/compile.pl
@@ -1 +1 @@
-/home/adrian/git/trb3sc/scripts/compile.pl
\ No newline at end of file
+../../trb3sc/scripts/compile.pl
\ No newline at end of file
diff --git a/thresholds/thresholds.prj b/thresholds/thresholds.prj
index 55e559c..a9a4dde 100644
--- a/thresholds/thresholds.prj
+++ b/thresholds/thresholds.prj
@@ -12,16 +12,17 @@ add_file -vhdl -lib work "../../trbnet/trb_net_std.vhd"
 add_file -vhdl -lib work "../../vhdlbasics/interface/spi_slave.vhd"
 add_file -vhdl -lib work "../../vhdlbasics/machxo3/sedcheck.vhd"
 add_file -vhdl -lib work "../../vhdlbasics/io/pwm.vhd"
-add_file -vhdl -lib work "../../logicbox/UFM_control/UFM_control.vhd"
-add_file -vhdl -lib work "../../logicbox/cores/flashram.vhd"
-add_file -vhdl -lib work "../../logicbox/cores/flash.vhd"
+#add_file -vhdl -lib work "../../logicbox/UFM_control/UFM_control.vhd"
+add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/flashram.vhd"
+add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/flash.vhd"
 
 
 #add_file -vhdl -lib work "../../logicbox/cores/flashram.vhd"
 #add_file -vhdl -lib work "cores/efb.vhd"
-add_file -verilog -lib work "../../logicbox/cores/efb_define_def.v"
-add_file -verilog -lib work "../../logicbox/cores/UFM_WB.v"
+add_file -verilog -lib work "../../vhdlbasics/machxo3/flash/efb_define_def.v"
+add_file -verilog -lib work "../../vhdlbasics/machxo3/flash/UFM_WB.v"
 
+add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/generic_flash_ctrl.vhd"
 add_file -vhdl -lib work "thresholds.vhd"