From: Andreas Neiser <neiser@kph.uni-mainz.de>
Date: Mon, 9 Mar 2015 07:19:31 +0000 (+0100)
Subject: Multicycle for debug state signal
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=54d1c41641438786cdd18299e94548b61e79cd44;p=trb3.git

Multicycle for debug state signal
---

diff --git a/ADC/trb3_periph_adc_constraints.lpf b/ADC/trb3_periph_adc_constraints.lpf
index 6d7446d..b29b186 100644
--- a/ADC/trb3_periph_adc_constraints.lpf
+++ b/ADC/trb3_periph_adc_constraints.lpf
@@ -93,6 +93,7 @@ USE PRIMARY NET "CLK_PCLK_RIGHT_c";
 
 MULTICYCLE FROM CELL "gen_reallogic*THE_ADC/gen_readout_cfd*gen_processors*THE_ADC_PROC/CONF_sys*" TO CELL "gen_reallogic*THE_ADC/gen_readout_cfd*gen_processors*THE_ADC_PROC/CONF_adc*" 4 X;
 MULTICYCLE FROM CELL "gen_reallogic*THE_ADC/gen_readout_cfd*gen_processors*THE_ADC_PROC/busy_in_sys*" TO CELL "gen_reallogic*THE_ADC/gen_readout_cfd*gen_processors*THE_ADC_PROC/busy_in_adc*" 2 X;
+MULTICYCLE FROM CELL "gen_reallogic*THE_ADC/THE_ADC_*/state_q_*" TO CELL "gen_reallogic*THE_ADC/THE_ADC_*/state_qq_*" 2 X;
 
 # we define everything doubled to make it work with all lattice/synplify versions
 # due to _ vs . notation of generate statements args...