From: Jan Michel <j.michel@gsi.de>
Date: Wed, 22 Aug 2018 12:47:24 +0000 (+0200)
Subject: add addresses for Trb5sc
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=551c49a2bcdfded5e23afdec5eecf6f88bee5623;p=daqdocu.git

add addresses for Trb5sc
---

diff --git a/trb3/Trb3GeneralRemarks.tex b/trb3/Trb3GeneralRemarks.tex
index ac46863..7e2f5db 100644
--- a/trb3/Trb3GeneralRemarks.tex
+++ b/trb3/Trb3GeneralRemarks.tex
@@ -116,6 +116,7 @@ have to contain one of the following values. The last digit should be used to de
  \item[9600] design for DiRich
  \item[9700] design for DiRich Combiner module
  \item[9900] design for Munich Skyroc boards
+ \item[A500] design for TRB5sc
 \end{description*}
 
 The lower 16 Bit are used to identify the contents of the design and the AddOn boards they should be used with. Combine 
@@ -213,6 +214,7 @@ All boards of a given type are accessible by a broadcast address at the same tim
  \item 0x70 Trb3sc TDC 4conn SFP
  \item 0x71 Trb3sc TDC 4conn Backplane
  \item 0x72 Trb3sc TDC KEL SFP
+ \item 0x80 Trb5sc 
 \end{itemize*}
 
 The initial address set with \signal{Regio\_Init\_Address} can be chosen from the following set:
@@ -226,6 +228,7 @@ The initial address set with \signal{Regio\_Init\_Address} can be chosen from th
  \item 0xF3CE crate master TRB3sc
  \item 0xF3D1 Dirch
  \item 0xF3DC Dirich combiner
+ \item 0xF355 Trb5sc
 \end{itemize*}