From: hadaq <hadaq>
Date: Mon, 10 Oct 2011 22:28:15 +0000 (+0000)
Subject: update
X-Git-Tag: v6.0~126
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=55de7a4b2ad1bddc8d5a3461315a11736330fdc8;p=trbnettools.git

update
---

diff --git a/libtrbnet/trbnet.c b/libtrbnet/trbnet.c
index d16af8e..7ee4df9 100644
--- a/libtrbnet/trbnet.c
+++ b/libtrbnet/trbnet.c
@@ -15,7 +15,7 @@
 #endif
 
 
-const char trbnet_version[] = "$Revision: 4.8 $";
+const char trbnet_version[] = "$Revision: 4.9 $";
 
 #include <stdlib.h>
 #include <signal.h>
@@ -564,11 +564,13 @@ static int trb_fifo_read(uint8_t channel,
 #ifdef PEXOR
   if (dataBufferSize == 0) {
     trb_errno = TRB_PEXOR_DMA_ERROR;
+    fprintf(stderr, "DMA: err 0\n");
     return -1;
   }
   if (read(pexorFileHandle,
            (void*)dataBuffer, dataBufferSize * 4) != dataBufferSize * 4) {
     trb_errno = TRB_PEXOR_DMA_ERROR;
+    fprintf(stderr, "DMA: err 1\n");
     return -1;
   }
 #else
@@ -1120,6 +1122,7 @@ static int trb_fifo_read(uint8_t channel,
 #ifdef PEXOR
     if (tmp - dataBuffer >= dataBufferSize) {
       trb_errno = TRB_PEXOR_DMA_ERROR;
+    fprintf(stderr, "DMA: err 2\n");
       return -1;
     }
     tmp++;
@@ -1854,6 +1857,14 @@ int trb_register_write_mem(uint16_t trb_address,
     write32_to_FPGA(CHANNEL_3_SENDER_CONTROL, CMD_REGISTER_WRITE_MEM);
 #else
     /* Send command to pexor driver */
+    if (write(pexorFileHandle,
+             (void*)(data + ctr), len * 4) != len * 4) {
+      trb_errno = TRB_PEXOR_DEVICE_ERROR;
+      unlockPorts(0);
+      trb_errno = TRB_PEXOR_DEVICE_ERROR;
+      return -1;
+    }
+
     pexorDescriptor.trb_address = trb_address;
     if (option == 0) {
       pexorDescriptor.reg_address = reg_address + ctr;
@@ -1861,8 +1872,7 @@ int trb_register_write_mem(uint16_t trb_address,
       pexorDescriptor.reg_address = reg_address;
     }
     pexorDescriptor.arg0 = config;
-    pexorDescriptor.arg1 = (unsigned long)(data + ctr);
-    pexorDescriptor.arg2 = len;
+    pexorDescriptor.arg1 = len;
     pexorDescriptor.command = PEXOR_TRBNETCOM_REG_WRITE_MEM;
     pexorDescriptor.dma = pexor_dma;
     
@@ -2289,13 +2299,12 @@ int fpga_register_read(uint32_t reg_address, uint32_t* value)
   int status = 0;
   
   trb_errno = TRB_NONE;
-
-  if (lockPorts(0) == -1) return -1;
-
 #ifndef PEXOR
   reg_address &= 0xffff;
 #endif
 
+  if (lockPorts(0) == -1) return -1;
+
   /* DEBUG INFO */
   if (trb_debug > 0) {
     fprintf(stderr, "fpga_register_read started.\n");
@@ -2313,13 +2322,12 @@ int fpga_register_write(uint32_t reg_address, uint32_t value)
   int status = 0;
   
   trb_errno = TRB_NONE;
-
-  if (lockPorts(0) == -1) return -1;
-
 #ifndef PEXOR
   reg_address &= 0xffff;
 #endif
 
+  if (lockPorts(0) == -1) return -1;
+
   /* DEBUG INFO */
   if (trb_debug > 0) {
     fprintf(stderr, "fpga_register_write started.\n");