From: Cahit <c.ugur@gsi.de>
Date: Fri, 6 Nov 2015 07:35:20 +0000 (+0100)
Subject: updated constraints
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=56b424eaa95358fd02a17e6a3738bb41f3c6d766;p=trb3sc.git

updated constraints
---

diff --git a/pinout/basic_constraints.lpf b/pinout/basic_constraints.lpf
index 66bd5dd..8783dea 100644
--- a/pinout/basic_constraints.lpf
+++ b/pinout/basic_constraints.lpf
@@ -48,7 +48,7 @@ FREQUENCY NET "THE_MEDIA_INTERFACE/clk_tx_full" 200 MHz; # HOLD_MARGIN 500 ps
 
 LOCATE COMP          "THE_MEDIA_INTERFACE/gen_pcs0.THE_SERDES/PCSD_INST" SITE "PCSA" ;
 LOCATE COMP          "THE_MEDIA_INTERFACE/gen_pcs3.THE_SERDES/PCSD_INST" SITE "PCSB" ;
-REGION               "MEDIA_UPLINK" "R102C55D" 13 50;
+REGION               "MEDIA_UPLINK" "R96C107D" 19 24;
 LOCATE UGROUP        "THE_MEDIA_INTERFACE/media_interface_group" REGION "MEDIA_UPLINK" ;
 
 BLOCK PATH TO   PORT "LED*";
diff --git a/tdctemplate/config_compile_gsi.pl b/tdctemplate/config_compile_gsi.pl
index 416f4ee..6adab21 100644
--- a/tdctemplate/config_compile_gsi.pl
+++ b/tdctemplate/config_compile_gsi.pl
@@ -11,4 +11,4 @@ nodelist_file                => 'nodes_gsi_template.txt',
 include_TDC                  => 1,
 
 firefox_open                 => 0,
-
+twr_number_of_errors         => 20,
diff --git a/tdctemplate/par.p2t b/tdctemplate/par.p2t
index f72683d..39a0684 100644
--- a/tdctemplate/par.p2t
+++ b/tdctemplate/par.p2t
@@ -4,7 +4,7 @@
 -n 1
 -y
 -s 12
--t 24
+-t 1
 -c 1
 -e 2
 #-g guidefile.ncd
diff --git a/tdctemplate/trb3sc_tdctemplate.lpf b/tdctemplate/trb3sc_tdctemplate.lpf
index b5995bb..c702426 100644
--- a/tdctemplate/trb3sc_tdctemplate.lpf
+++ b/tdctemplate/trb3sc_tdctemplate.lpf
@@ -1,8 +1,8 @@
-MULTICYCLE FROM CLKNET "clk_sys" TO CLKNET "clk_full" 1 X ;
-MULTICYCLE FROM CLKNET "clk_full" TO CLKNET "clk_sys" 2 X ;
+MULTICYCLE FROM CLKNET "clk_sys" TO CLKNET "clk_full_osc" 1 X ;
+MULTICYCLE FROM CLKNET "clk_full_osc" TO CLKNET "clk_sys" 2 X ;
 
-MULTICYCLE FROM CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_full TO CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x;
-MULTICYCLE FROM CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_full TO CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x;
+MULTICYCLE FROM CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_full_osc TO CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x;
+MULTICYCLE FROM CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_full_osc TO CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x;
 
 MULTICYCLE FROM CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/final_reset*" CLKNET clk_sys TO CLKNET clk_sys 5x;
-MULTICYCLE FROM CELL "THE_TDC/reset_tdc*" TO CLKNET clk_full 2x;
+MULTICYCLE FROM CELL "THE_TDC/reset_tdc*" TO CLKNET clk_full_osc 2x;