From: Maps <maps@ikf>
Date: Tue, 21 Feb 2023 15:50:17 +0000 (+0100)
Subject: Better plotdac.gp, replaced testmode.pl with CONF
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=5fe0537ee00431682dc0df5374e756bb224a8d91;p=mimosis_chain.git

Better plotdac.gp, replaced testmode.pl with CONF
---

diff --git a/.gitignore b/.gitignore
index 22ca6d7..6a0aad4 100644
--- a/.gitignore
+++ b/.gitignore
@@ -7,3 +7,5 @@
 *out
 *log
 scratch
+git
+data/
diff --git a/scripts/CONF_allregisters.pl b/scripts/CONF_allregisters.pl
index 3b1078c..082b855 100644
--- a/scripts/CONF_allregisters.pl
+++ b/scripts/CONF_allregisters.pl
@@ -30,7 +30,7 @@
   [0x0048,   0x78  ], #VCASNA      0 - 1.54 V     ,  6 mV       Pixel threshold voltage for submatrix A
   [0x0049,   0x78  ], #VCASNB      0 - 1.54 V     ,  6 mV       Pixel threshold voltage for submatrix B
   [0x004a,   0x78  ], #VCASNC      0 - 1.54 V     ,  6 mV       Pixel threshold voltage for submatrix C
-  [0x004b,   0x6d  ], #VCASND      0 - 1.54 V     ,  6 mV       Pixel threshold voltage for submatrix D
+  [0x004b,   0x60  ], #VCASND      0 - 1.54 V     ,  6 mV       Pixel threshold voltage for submatrix D
   [0x004c,   0x3c  ], #VCASN2      0 - 1.54 V     ,  6 mV       Pixel voltage
   [0x004d,   0x37  ], #VCLIP       0 - 1.54 V     ,  6 mV       Pixel clipping amplifier voltage
   [0x004e,   0x7d  ], #IBUFBIAS    0 - 10 μA      ,  312 pA     Internal buffer bias (not in pixel)
diff --git a/scripts/CONF_testmode_enable.pl b/scripts/CONF_testmode_enable.pl
new file mode 100644
index 0000000..9831f7e
--- /dev/null
+++ b/scripts/CONF_testmode_enable.pl
@@ -0,0 +1,19 @@
+#read files like my @config = do "CONF_allregisters.pl";
+#same like testmode_enabled.pl
+  [0x8040,   0xaa  ], # PATTERN0
+  [0x8041,   0xfc  ], # PATTERN1
+  [0x8042,   0xaa  ], # PATTERN2
+  [0x8043,   0xfc  ], # PATTERN3
+  [0x8044,   0xaa  ], # PATTERN4
+  [0x8045,   0xfc  ], # PATTERN5
+  [0x8046,   0xaa  ], # PATTERN6
+  [0x8047,   0xfc  ], # PATTERN7
+  [0x8048,   0xaa  ], # PATTERN8
+  [0x8049,   0xfc  ], # PATTERN9
+  [0x804A,   0xaa  ], # PATTERN10
+  [0x804B,   0xfc  ], # PATTERN11
+  [0x804C,   0xaa  ], # PATTERN12
+  [0x804D,   0xfc  ], # PATTERN13
+  [0x804E,   0xaa  ], # PATTERN14
+  [0x804F,   0xfc  ], # PATTERN15
+  [0x0020,   0x48  ], #
diff --git a/scripts/basicsettings.pl b/scripts/basicsettings.pl
index 51f187b..6263644 100755
--- a/scripts/basicsettings.pl
+++ b/scripts/basicsettings.pl
@@ -5,6 +5,7 @@ use Getopt::Long;
 use HADES::TrbNet;
 use lib ".";
 use Mimosis;
+use Time::HiRes qw(usleep);
 
 my $fpga   = 0xa000;
 my @config = do $ARGV[0];
@@ -38,6 +39,8 @@ foreach my $a (@config) {
 
         Mimosis::mimosis_register_write( $fpga, @$a[0], @$a[1] );
 
+        # usleep(1000);
+
         # printf( "%x %x %x\n", $fpga, @$a[0], @$a[1] );
     }
 }
diff --git a/scripts/dac_scan/dac_scan.pl b/scripts/dac_scan/dac_scan.pl
index afe78bd..1c9e087 100755
--- a/scripts/dac_scan/dac_scan.pl
+++ b/scripts/dac_scan/dac_scan.pl
@@ -56,6 +56,8 @@ $conv_f = ( 2 * 4096 ) / 2**16;
 
 trb_init_ports() or die trb_strerror();
 
+trb_register_write( $fpga, 0xd680, 0x1e );    #write speed 30 to adc
+
 my $vmon_file  = "vmon_data.csv";
 my $imon_file  = "imon_data.csv";
 my $other_file = "other_data.csv";
diff --git a/scripts/dac_scan/plotdac.gp b/scripts/dac_scan/plotdac.gp
index bebce09..9f89b54 100755
--- a/scripts/dac_scan/plotdac.gp
+++ b/scripts/dac_scan/plotdac.gp
@@ -1,8 +1,18 @@
-set multiplot layout 1,3
-set title "VCASP, VCASNA, VCASNB, VCASNC,\nVCASND, VCASN2, VCLIP"
-# set title "VCASND"
-plot for [i=0:6] 'vmon_data.csv' using 2:3 index i with l notitle
-set title "IBIAS, ITHR, IDB"
-plot for [i=0:2] 'imon_data.csv' using 2:3 index i with l notitle
-set title "VRESET, VPH, VPL"
-plot for [i=0:2] 'other_data.csv' using 2:3 index i with l notitle
+set terminal pngcairo size 1000,1000
+set output strftime('img/%F_%H-%M-%S.png', time(0))
+set multiplot layout 2,2
+set key Left left top box
+set xlabel "set."
+set ylabel "[mV]"
+
+array names0[7] = ["VCASP", "VCASNA", "VCASNB", "VCASNC", "VCASND", "VCASN2", "VCLIP"]
+plot for [i=0:6] 'vmon_data.csv' using 2:3 index i with l title names0[i+1]
+array names1[3] = ["IBIAS", "ITHR", "IDB"]
+plot for [i=0:2] 'imon_data.csv' using 2:3 index i with l title names1[i+1]
+array names2[3] = ["VRESET", "VPH", "VPL"]
+plot for [i=0:2] 'other_data.csv' using 2:3 index i with l title names2[i+1]
+plot 'vphfine_data.csv' using 2:3 with l title "VPH\\\_FINE (VPH)"
+
+# set terminal qt
+# set output
+# replot
diff --git a/scripts/legacy/testmode_enable.sh b/scripts/legacy/testmode_enable.sh
new file mode 100755
index 0000000..5c01c97
--- /dev/null
+++ b/scripts/legacy/testmode_enable.sh
@@ -0,0 +1,21 @@
+#!/bin/bash
+
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x40aa
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x41fc
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x42aa
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x43fc
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x44aa
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x45fc
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x46aa
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x47fc
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x48aa
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x49fc
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x4aaa
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x4bfc
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x4caa
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x4dfc
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x4eaa
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x80 -d 0x4ffc
+
+./i2c_cmd2.pl -w 1 -f 0xfe82 -a 0x12 -c 0x00 -d 0x2048
+
diff --git a/scripts/startup_routine.pl b/scripts/startup_routine.pl
new file mode 100755
index 0000000..32edb00
--- /dev/null
+++ b/scripts/startup_routine.pl
@@ -0,0 +1,57 @@
+#!/usr/bin/perl
+
+use warnings;
+
+use HADES::TrbNet;
+use Time::HiRes qw(usleep);
+
+trb_init_ports() or die trb_strerror();
+
+my @fpgas       = (0xa000);    # List of FPGA's
+my $reg_address = 0xde01;
+
+for my $fpga (@fpgas) {
+
+    my $addr     = 0x11;                             #INSTR global reset
+    my $cmd      = 0xe0;
+    my $reg_data = ( $cmd << 8 ) + ( $addr << 1 );
+    my $reg_flag = 0x0;
+    trb_register_write_mem( $fpga, $reg_address, 0,
+        [ $reg_flag, $reg_data, 0x1 ], 3 );
+
+    usleep(1000);
+
+    $addr     = 0x12;                                #ADD_MSB
+    $cmd      = 0x00;
+    $reg_data = ( $cmd << 8 ) + ( $addr << 1 );
+    $reg_flag = 0x0;
+    trb_register_write_mem( $fpga, $reg_address, 0,
+        [ $reg_flag, $reg_data, 0x1 ], 3 );
+
+    usleep(1000);
+
+    $addr     = 0x13;                                #ADD_LSB
+    $cmd      = 0x27;
+    $reg_data = ( $cmd << 8 ) + ( $addr << 1 );
+    $reg_flag = 0x0;
+    trb_register_write_mem( $fpga, $reg_address, 0,
+        [ $reg_flag, $reg_data, 0x1 ], 3 );
+
+    usleep(1000);
+
+    $addr     = 0x14;                                #WR
+    $cmd      = 0x3;
+    $reg_data = ( $cmd << 8 ) + ( $addr << 1 );
+    $reg_flag = 0x0;
+    trb_register_write_mem( $fpga, $reg_address, 0,
+        [ $reg_flag, $reg_data, 0x1 ], 3 );
+}
+
+foreach $fpga (@fpgas) {
+    $addr     = 0x11;                                #INSTR set start
+    $cmd      = 0x3;
+    $reg_data = ( $cmd << 8 ) + ( $addr << 1 );
+    $reg_flag = 0x0;
+    trb_register_write_mem( $fpga, $reg_address, 0,
+        [ $reg_flag, $reg_data, 0x1 ], 3 );
+}