From: Ingo Froehlich <ingo@nomail.fake>
Date: Wed, 4 Dec 2019 16:20:40 +0000 (+0100)
Subject: most recent test bench
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=671dad61086bef4a33eb58795049ad6de9e9f289;p=trbnet.git

most recent test bench
---

diff --git a/media_interfaces/sync/tb/med_sync_tb.vhd b/media_interfaces/sync/tb/med_sync_tb.vhd
index 33fd8d5..630f4d7 100644
--- a/media_interfaces/sync/tb/med_sync_tb.vhd
+++ b/media_interfaces/sync/tb/med_sync_tb.vhd
@@ -1,6 +1,8 @@
 
 LIBRARY ieee  ; 
-LIBRARY work  ; 
+LIBRARY work  ;
+use ieee.math_real.all; 
+
 USE ieee.NUMERIC_STD.all  ; 
 USE ieee.std_logic_1164.all;
 use ieee.std_logic_arith.all;
@@ -96,6 +98,8 @@ signal tx_k_m, tx_k_s, rx_k_m, rx_k_s : std_logic;
 
 signal do_once : std_logic_vector(1 downto 0) := "00";
 
+signal jitter : time := 0 ns;
+
 begin
 
 reset_m <= '0' after 201 ns;
@@ -103,85 +107,83 @@ clear_m <= '0' after 51 ns;
 reset_s <= '0' after 201 ns;
 clear_s <= '0' after 51 ns;
 
-process (tx_data_m, tx_k_m)
-begin
-  if (tx_data_m = x"11") then
-    rx_k_s <= transport tx_k_m after 250 ns;
-    rx_data_s <= transport tx_data_m after 250 ns;
-    if do_once = "00" then
-      rx_data_s(7 downto 1) <= transport tx_data_m(7 downto 1) after 250 ns;
-      rx_data_s(0) <= transport '0' after 250 ns;
-      ----rx_k_s <= transport (not tx_k_m) after 250 ns;
-      do_once <= "01"; --2 errors, one good
-      --do_once <= "10";  --1 error, 2 good
-    elsif do_once = "01" then
-      rx_data_s(7 downto 1) <= transport tx_data_m(7 downto 1) after 250 ns;
-      rx_data_s(0) <= transport '0' after 250 ns;
-      do_once <= "10";
-    elsif do_once = "10" then
-      do_once <= "11";
-      rx_data_s <= transport tx_data_m after 250 ns;
-    else
-      do_once <= "00";
-      rx_data_s <= transport tx_data_m after 250 ns;
-    end if;
-  else
-    rx_k_s    <= transport tx_k_m after 250 ns; 
-    rx_data_s <= transport tx_data_m after 250 ns;
-  end if;
-end process;
-
+rx_k_s    <= transport tx_k_m after 250 ns; 
+rx_data_s <= transport tx_data_m after 250 ns;
 rx_data_m <= transport tx_data_s after 250 ns;
-
 rx_k_m    <= transport tx_k_s after 250 ns;
 
 clk_100_m <= not clk_100_m after 5 ns;
 clk_200_m <= not clk_200_m after 2.5 ns;
---clk_100_s <= not clk_100_s after 5 ns;
---clk_100_s <= not clk_100_s after 5.1 ns;
-clk_100_s <= not clk_100_s after 4.8 ns;
---clk_200_s <= not clk_200_s after 2.5 ns;
---clk_200_s <= not clk_200_s after 2.55 ns;
-clk_200_s <= not clk_200_s after 2.4 ns;
+clk_100_s <= not clk_100_s after 5 ns + jitter;
+clk_200_s <= not clk_200_s after 2.5 ns + jitter;
 
-process begin
-  BUS_RX_s.addr  <= x"0000";
-  wait for 30000ns;
-  BUS_RX_s.write <= '1';
-  BUS_RX_s.data  <= x"00000050";
-  wait for 20ns;
-  BUS_RX_s.write <= '0';
-  BUS_RX_s.data  <= x"00000000";
-  
-  wait for 2000ns;
-  BUS_RX_s.write <= '1';
-  BUS_RX_s.data  <= x"00000001";
-  wait for 20ns;
-  BUS_RX_s.write <= '0';
-  BUS_RX_s.data  <= x"00000000";
+process
+  variable seed1, seed2: positive;    
+  variable rand1 : real;            
+begin
+  loop
+    uniform(seed1, seed2, rand1);
+    jitter <= (rand1 * 0.01 ns); --  - 0.01 ns;
+    wait for 2.5 ns;
+  end loop;
 end process;
 
+
 process begin
-  BUS_RX_m.addr  <= x"0000";
-  wait for 32000ns;
---  BUS_RX_m.write <= '1';
-  BUS_RX_m.data  <= x"00000200";
-  wait for 20ns;
-  BUS_RX_m.write <= '0';
-  BUS_RX_m.data  <= x"00000000";
-end process;
+  int2med_s.ctrl_op <= x"0100";
+  int2med_s.data <= x"0000";
+  int2med_s.packet_num <= "000";
+  int2med_s.dataready <= '0';
+
+  wait for 30.5 us;
   
+  GEN_GOOD_S: for i in 0 to 1000 loop
+  wait until rising_edge(clk_100_m); wait for 1 ns;
+  int2med_s.data <= conv_std_logic_vector(i,16);
+  int2med_s.packet_num <= "100";
+  int2med_s.dataready <= '1';
+  wait until rising_edge(clk_100_m); wait for 1 ns;
+  int2med_s.data <= x"0101";
+  int2med_s.packet_num <= "000";
+  int2med_s.dataready <= '1';
+  wait until rising_edge(clk_100_m); wait for 1 ns;
+  int2med_s.data <= x"0202";
+  int2med_s.packet_num <= "001";
+  int2med_s.dataready <= '1';
+  wait until rising_edge(clk_100_m); wait for 1 ns;
+  int2med_s.data <= x"0303";
+  int2med_s.packet_num <= "010";
+  int2med_s.dataready <= '1';
+  wait until rising_edge(clk_100_m); wait for 1 ns;
+  int2med_s.data <= x"0404";
+  int2med_s.packet_num <= "011";
+  int2med_s.dataready <= '1';
+  wait until rising_edge(clk_100_m); wait for 1 ns;
+  int2med_s.dataready <= '0';
+  int2med_s.data <= x"0000";
+  wait for 50ns;
+  -- wait for 1ns;
+  end loop;
+  
+end process;          
+
 process begin
   int2med_m.ctrl_op <= x"0000";
-  int2med_s.ctrl_op <= x"0000";
+  wait for 31 us;
+  int2med_m.ctrl_op <= x"0100";
+  wait;
+end process;          
+
+process begin
   int2med_m.data <= x"0000";
   int2med_m.packet_num <= "000";
   int2med_m.dataready <= '0';
-  wait for 30 us;
+  wait for 30.5 us;
 
-  -- Initial packet to enable crc
+
+  GEN_GOOD: for i in 0 to 31 loop
   wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"0001";
+  int2med_m.data <= conv_std_logic_vector(i,8) & x"01";
   int2med_m.packet_num <= "100";
   int2med_m.dataready <= '1';
   wait until rising_edge(clk_100_m); wait for 1 ns;
@@ -203,11 +205,13 @@ process begin
   wait until rising_edge(clk_100_m); wait for 1 ns;
   int2med_m.dataready <= '0';
   int2med_m.data <= x"0000";
-  wait for 100ns;
+--  wait for 20ns;
+  wait for 1ns;
+  end loop;
+
+  wait for 20ns;
   
-  -- generate good packages to test the RAM overflow
-  --GEN_GOOD: for i in 0 to 3 loop
-  GEN_GOOD: for i in 0 to 24 loop
+  GEN_GOOD2: for i in 0 to 3 loop
   wait until rising_edge(clk_100_m); wait for 1 ns;
   int2med_m.data <= conv_std_logic_vector(i,8) & x"01";
   int2med_m.packet_num <= "100";
@@ -217,6 +221,10 @@ process begin
   int2med_m.packet_num <= "000";
   int2med_m.dataready <= '1';
   wait until rising_edge(clk_100_m); wait for 1 ns;
+    --int2med_m.data <= x"0002";
+    --int2med_m.packet_num <= "000";
+    --int2med_m.dataready <= '0';
+    --wait until rising_edge(clk_100_m); wait for 1 ns;
   int2med_m.data <= x"0003";
   int2med_m.packet_num <= "001";
   int2med_m.dataready <= '1';
@@ -231,66 +239,40 @@ process begin
   wait until rising_edge(clk_100_m); wait for 1 ns;
   int2med_m.dataready <= '0';
   int2med_m.data <= x"0000";
-  wait for 20ns; 
-  end loop;
-
-  GEN_BAD: for i in 0 to 0 loop
-  --bad packages
---  wait for 500ns;
-  wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"1122";
-  --int2med_m.data <= x"1111";  --for k flip
-  int2med_m.packet_num <= "100";
-  int2med_m.dataready <= '1';
-  wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"3344";
-  int2med_m.packet_num <= "000";
-  int2med_m.dataready <= '1';
-  wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"5566";
-  int2med_m.packet_num <= "001";
-  int2med_m.dataready <= '1';
-  wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"7788";
-  int2med_m.packet_num <= "010";
-  int2med_m.dataready <= '1';
-  wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"9900";
-  int2med_m.packet_num <= "011";
-  int2med_m.dataready <= '1';
---  wait until rising_edge(clk_100_m); wait for 1 ns;
---  int2med_m.dataready <= '0';
---  wait until rising_edge(clk_100_m); wait for 1 ns;
+--  wait for 20ns;
+  wait for 1ns;
   end loop;
---  wait until rising_edge(clk_100_m); wait for 1 ns;
---  wait until rising_edge(clk_100_m); wait for 1 ns;
---  wait until rising_edge(clk_100_m); wait for 1 ns;
---  wait until rising_edge(clk_100_m); wait for 1 ns;
---  wait until rising_edge(clk_100_m); wait for 1 ns;
 
-  --good package
+  wait for 100ns;
+  
+ GEN_GOOD3: for i in 0 to 31 loop
   wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"ff01";
+  int2med_m.data <= conv_std_logic_vector(i,8) & x"01";
   int2med_m.packet_num <= "100";
   int2med_m.dataready <= '1';
   wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"ff02";
+  int2med_m.data <= x"0002";
   int2med_m.packet_num <= "000";
   int2med_m.dataready <= '1';
   wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"ff03";
+  int2med_m.data <= x"0003";
   int2med_m.packet_num <= "001";
   int2med_m.dataready <= '1';
   wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"ff04";
+  int2med_m.data <= x"0004";
   int2med_m.packet_num <= "010";
   int2med_m.dataready <= '1';
   wait until rising_edge(clk_100_m); wait for 1 ns;
-  int2med_m.data <= x"ff05";
+  int2med_m.data <= x"0005";
   int2med_m.packet_num <= "011";
   int2med_m.dataready <= '1';
   wait until rising_edge(clk_100_m); wait for 1 ns;
   int2med_m.dataready <= '0';
+  int2med_m.data <= x"0000";
+--  wait for 20ns;
+  wait for 1ns;
+  end loop;
+
 
   
 end process;