From: admin <admin@44570794-fe78-5344-a7c8-9252e64eda2e>
Date: Fri, 30 Aug 2013 19:00:40 +0000 (+0000)
Subject: git-svn-id: file:///d/jspc55.1/Elektronik/repo@10 44570794-fe78-5344-a7c8-9252e64eda2e
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=69dd0318da9c41139b031a746870c4ac7df5d29b;p=mvdelectronics.git

git-svn-id: file:///d/jspc55.1/Elektronik/repo@10 44570794-fe78-5344-a7c8-9252e64eda2e
---

diff --git a/CB2013/CB13_FebOutput.SchDoc b/CB2013/CB13_FebOutput.SchDoc
index 13b81c9..487ce09 100644
Binary files a/CB2013/CB13_FebOutput.SchDoc and b/CB2013/CB13_FebOutput.SchDoc differ
diff --git a/CB2013/CB2013.PcbDoc b/CB2013/CB2013.PcbDoc
index da1b8ce..d8b1c5c 100644
Binary files a/CB2013/CB2013.PcbDoc and b/CB2013/CB2013.PcbDoc differ
diff --git a/CB2013/CB2013.PrjPCB b/CB2013/CB2013.PrjPCB
index 3c02d47..8932950 100644
--- a/CB2013/CB2013.PrjPCB
+++ b/CB2013/CB2013.PrjPCB
@@ -29,7 +29,7 @@ PowerPortNamesTakePriority=0
 PushECOToAnnotationFile=1
 DItemRevisionGUID=
 ReportSuppressedErrorsInMessages=0
-OutputPath=Project Outputs for CB2013
+OutputPath=
 
 [Document1]
 DocumentPath=CB13_ADC.SchDoc
@@ -452,7 +452,7 @@ SCH_HasExpandLogicalToPhysicalSheets=-1
 SaveSettingsToOutJob=-1
 
 [Generic_EDE]
-OutputDir=Project Outputs for CB2013
+OutputDir=
 
 [OutputGroup1]
 Name=Netlist Outputs
@@ -1460,8 +1460,8 @@ IndexStartValue15=1
 Suffix15=
 
 [PrjClassGen]
-CompClassManualEnabled=0
-CompClassManualRoomEnabled=0
+CompClassManualEnabled=1
+CompClassManualRoomEnabled=1
 NetClassAutoBusEnabled=1
 NetClassAutoCompEnabled=0
 NetClassAutoNamedHarnessEnabled=0
diff --git a/CB2013/ConverterBoard2013.SchDoc b/CB2013/ConverterBoard2013.SchDoc
index feb1689..4e2f81e 100644
Binary files a/CB2013/ConverterBoard2013.SchDoc and b/CB2013/ConverterBoard2013.SchDoc differ