From: Adrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Date: Mon, 13 Sep 2021 10:31:28 +0000 (+0200)
Subject: small fixes related to trbnet updates
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=6ca4ad3faca1eeb32e731250381f14d0a6133e27;p=dirich.git

small fixes related to trbnet updates
---

diff --git a/dirich/config.vhd b/dirich/config.vhd
index cd5287b..9bee225 100644
--- a/dirich/config.vhd
+++ b/dirich/config.vhd
@@ -15,7 +15,7 @@ package config is
 --TDC settings
   constant BOARD                   : string                := "dirich";  -- Options: dirich, trb3
   constant NUM_TDC_MODULES         : integer range 1 to 4  := 1;  -- number of tdc modules to implement
-  constant NUM_TDC_CHANNELS        : integer range 1 to 65 := 33;  -- number of tdc channels per module
+  constant NUM_TDC_CHANNELS        : integer range 1 to 65 := 33; -- number of tdc channels per module
   constant NUM_TDC_CHANNELS_POWER2 : integer range 0 to 6  := 5;  --the nearest power of two, for convenience reasons 
   constant DOUBLE_EDGE_TYPE        : integer range 0 to 3  := 3;  --double edge type:  0, 1, 2,  3
   -- 0: single edge only,
@@ -58,7 +58,7 @@ package config is
     constant MONITOR_INPUT_NUM      : integer  := 32;
   
 --Retransmission
-    constant USE_RETRANSMISSION     : integer  := c_YES;
+    constant USE_RETRANSMISSION     : integer  := c_NO;--c_YES;
 
 --Misc
     constant FPGA_SIZE : string := "85KUM";
diff --git a/dirich/config_compile_giessen.pl b/dirich/config_compile_giessen.pl
new file mode 100644
index 0000000..2b62a22
--- /dev/null
+++ b/dirich/config_compile_giessen.pl
@@ -0,0 +1,28 @@
+Familyname  => 'ECP5UM',
+Devicename  => 'LFE5UM-85F',
+Package     => 'CABGA381',
+Speedgrade  => '8',
+
+
+TOPNAME                      => "dirich",
+lm_license_file_for_synplify => "7788\@fb07pc-u102325",
+lm_license_file_for_par      => "7788\@fb07pc-u102325",
+lattice_path                 => '/usr/local/diamond/3.11_x64/',
+synplify_path                => '/usr/local/diamond/3.11_x64/synpbase',
+synplify_command             => "synpwrap -fg -options",
+
+nodelist_file                => '../nodelist_frankfurt.txt',
+pinout_file                  => 'dirich2',
+par_options                  => '../par.p2t',
+
+
+#Include only necessary lpf files
+include_TDC                  => 1,
+include_GBE                  => 0,
+
+#Report settings
+firefox_open                 => 0,
+twr_number_of_errors         => 20,
+no_ltxt2ptxt                 => 1,  #if there is no serdes being used
+#make_jed                     => 1,
+
diff --git a/dirich/dirich.prj b/dirich/dirich.prj
index f7dee80..f4f4dfa 100644
--- a/dirich/dirich.prj
+++ b/dirich/dirich.prj
@@ -139,7 +139,7 @@ add_file -vhdl -lib work "../../trbnet/media_interfaces/med_ecp5_sfp_sync.vhd"
 add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0_softlogic.v"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs.vhd"
-
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs2.vhd"
 
 
 #TrbNet Endpoint
@@ -173,6 +173,7 @@ add_file -vhdl -lib work "../../trbnet/trb_net16_io_multiplexer.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_trigger.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_ipudata.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_gbe.vhd"
 add_file -vhdl -lib work "../../trbnet/basics/signal_sync.vhd"
 add_file -vhdl -lib work "../../trbnet/basics/ram_dp_rw.vhd"
 add_file -vhdl -lib work "../../trbnet/basics/pulse_stretch.vhd"