From: Michael Boehmer Date: Mon, 27 Jun 2022 22:04:38 +0000 (+0200) Subject: first working version X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=715debdd9dff4e7a99a236be5b8e06794c02cf36;p=trbnet.git first working version --- diff --git a/gbe_trb/base/gbe_med_interface_single_5G.vhd b/gbe_trb/base/gbe_med_interface_single_5G.vhd index 931aee6..f205668 100644 --- a/gbe_trb/base/gbe_med_interface_single_5G.vhd +++ b/gbe_trb/base/gbe_med_interface_single_5G.vhd @@ -209,10 +209,13 @@ architecture RTL of gbe_med_interface_single_5G is signal xmit : std_logic_vector(0 downto 0); signal sd_tx_correct_disp : std_logic_vector(0 downto 0); signal sd_rx_data : std_logic_vector(7 downto 0); +-- signal sd_rx_data_q : std_logic_vector(7 downto 0); signal sd_rx_kcntl : std_logic_vector(0 downto 0); +-- signal sd_rx_kcntl_q : std_logic_vector(0 downto 0); signal sd_rx_disp_error : std_logic_vector(0 downto 0); +-- signal sd_rx_disp_error_q : std_logic_vector(0 downto 0); signal sd_rx_cv_error : std_logic_vector(0 downto 0); --- signal los : std_logic; +-- signal sd_rx_cv_error_q : std_logic_vector(0 downto 0); signal lsm_status : std_logic; signal rx_clk_en : std_logic; signal tx_clk_en : std_logic; @@ -261,12 +264,72 @@ architecture RTL of gbe_med_interface_single_5G is signal pulse2 : std_logic; signal fake : std_logic_vector(0 downto 0); + +-- type statetype is (S_KOMMA, S_DATA, S_CH, S_CL); +-- signal CSTATE : statetype; -- current state of lsm +-- signal NSTATE : statetype; -- next state of lsm +-- signal counter : unsigned(15 downto 0); +-- +-- attribute syn_preserve : boolean; +-- attribute syn_keep : boolean; +-- +-- attribute syn_preserve of sd_rx_data : signal is true; +-- attribute syn_keep of sd_rx_data : signal is true; +-- attribute syn_preserve of sd_rx_kcntl : signal is true; +-- attribute syn_keep of sd_rx_kcntl : signal is true; +-- attribute syn_preserve of sd_tx_data : signal is true; +-- attribute syn_keep of sd_tx_data : signal is true; +-- attribute syn_preserve of sd_tx_kcntl : signal is true; +-- attribute syn_keep of sd_tx_kcntl : signal is true; begin -- We allow only one GbE in ECP5 for now assert not (LINKS_ACTIVE = b"0000") report "Error: no GbE interface selected" severity error; +-- -- State machine clocked process +-- THE_FSM_PROC: process( CLK_125_IN ) +-- begin +-- if( rising_edge(CLK_125_IN) ) then +-- CSTATE <= NSTATE; +-- end if; +-- end process THE_FSM_PROC; +-- +-- THE_FSM_DECODE_PROC: process( CSTATE ) +-- begin +-- case CSTATE is +-- when S_KOMMA => +-- NSTATE <= S_DATA; +-- sd_tx_data <= x"bc"; +-- sd_tx_kcntl(0) <= '1'; +-- when S_DATA => +-- NSTATE <= S_CH; +-- sd_tx_data <= x"b5"; +-- sd_tx_kcntl(0) <= '0'; +-- when S_CH => +-- NSTATE <= S_CL; +-- sd_tx_data <= std_logic_vector(counter(15 downto 8)); +-- sd_tx_kcntl(0) <= '0'; +-- when S_CL => +-- NSTATE <= S_KOMMA; +-- sd_tx_data <= std_logic_vector(counter(7 downto 0)); +-- sd_tx_kcntl(0) <= '0'; +-- when others => +-- NSTATE <= S_KOMMA; +-- sd_tx_data <= x"bc"; +-- sd_tx_kcntl(0) <= '1'; +-- end case; +-- end process THE_FSM_DECODE_PROC; +-- +-- THE_COUNTER_PROC: process( CLK_125_IN ) +-- begin +-- if( rising_edge(CLK_125_IN) ) then +-- if( CSTATE = S_KOMMA ) then +-- counter <= counter + 1; +-- end if; +-- end if; +-- end process THE_COUNTER_PROC; + -------------------------------------------------------------------- -------------------------------------------------------------------- -- debug(255 downto 0) <= (others => '0'); @@ -391,11 +454,17 @@ begin D_OUT(1) => rx_serdes_rst_q ); + -- register stage to relax timing +-- sd_rx_data_q <= sd_rx_data when rising_edge(sd_rx_clk); +-- sd_rx_kcntl_q <= sd_rx_kcntl when rising_edge(sd_rx_clk); +-- sd_rx_disp_error_q <= sd_rx_disp_error_q when rising_edge(sd_rx_clk); +-- sd_rx_cv_error_q <= sd_rx_cv_error_q when rising_edge(sd_rx_clk); + -- "Good" debugging pins debug(7 downto 0) <= sd_tx_data; debug(15 downto 8) <= sd_rx_data; - debug(16) <= sd_rx_kcntl(0); - debug(17) <= sd_tx_kcntl(0); + debug(16) <= sd_tx_kcntl(0); + debug(17) <= sd_rx_kcntl(0); debug(18) <= '0'; debug(19) <= '0'; -- "Bad" debugging pins @@ -404,15 +473,20 @@ begin debug(22) <= rx_los_low; debug(23) <= sd_rx_cv_error(0); debug(24) <= lsm_status; - debug(25) <= '0'; - debug(26) <= '0'; - debug(27) <= '0'; - debug(28) <= '0'; - debug(29) <= '0'; + debug(25) <= mr_main_reset; + debug(26) <= mr_an_enable; + debug(27) <= mr_restart_an; + debug(28) <= mr_page_rx; + debug(29) <= an_complete; debug(30) <= '0'; debug(31) <= '0'; debug(32) <= link_rx_ready; debug(33) <= link_tx_ready; +-- debug(125) <= sd_rx_data(0) or sd_rx_data(1) or sd_rx_data(2) or sd_rx_data(3) or +-- sd_rx_data(4) or sd_rx_data(5) or sd_rx_data(6) or sd_rx_data(7) or +-- sd_rx_kcntl(0); + debug(126) <= link_rx_ready; + debug(127) <= link_tx_ready; -- SGMII core SGMII_GBE_PCS : sgmii_gbe_core