From: hadeshyp <hadeshyp>
Date: Thu, 1 Jul 2010 08:08:01 +0000 (+0000)
Subject: *** empty log message ***
X-Git-Tag: oldGBE~242
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=73966e59f1601ff390f8afbc1ec977af60a999b5;p=trbnet.git

*** empty log message ***
---

diff --git a/special/handler_lvl1.vhd b/special/handler_lvl1.vhd
index 4079f48..bccdb72 100644
--- a/special/handler_lvl1.vhd
+++ b/special/handler_lvl1.vhd
@@ -23,10 +23,10 @@ entity handler_lvl1 is
     LVL1_TRG_NUMBER_IN           : in  std_logic_vector(15 downto 0);
     LVL1_TRG_CODE_IN             : in  std_logic_vector(7 downto 0);
     LVL1_TRG_INFORMATION_IN      : in  std_logic_vector(23 downto 0);
-    LVL1_ERROR_PATTERN_OUT       : out std_logic_vector(31 downto 0);
-    LVL1_TRG_RELEASE_OUT         : out std_logic := '0';
+    LVL1_ERROR_PATTERN_OUT       : out std_logic_vector(31 downto 0);  --errorbits to CTS
+    LVL1_TRG_RELEASE_OUT         : out std_logic := '0';               --release to CTS
 
-    LVL1_INT_TRG_NUMBER_OUT      : out std_logic_vector(15 downto 0);
+    LVL1_INT_TRG_NUMBER_OUT      : out std_logic_vector(15 downto 0);  --increased after trigger release
 
     --FEE logic / Data Handler
     LVL1_TRG_DATA_VALID_OUT      : out std_logic;    --trigger type, number, code, information are valid
@@ -34,10 +34,12 @@ entity handler_lvl1 is
     LVL1_VALID_NOTIMING_TRG_OUT  : out std_logic;    --valid trigger without timing trigger has been received
     LVL1_INVALID_TRG_OUT         : out std_logic;    --the current trigger is invalid (e.g. no timing trigger, no LVL1...)
 
-    LVL1_ERROR_PATTERN_IN        : in  std_logic_vector(31 downto 0);
-    LVL1_TRG_RELEASE_IN          : in  std_logic := '0';
-
+    LVL1_ERROR_PATTERN_IN        : in  std_logic_vector(31 downto 0);  -- error pattern from FEE
+    LVL1_TRG_RELEASE_IN          : in  std_logic := '0';               -- trigger release from FEE
 
+    --Stat/Control
+    STATUS_OUT                   : out std_logic_vector (31 downto 0); --bits for status registers
+    TRG_ENABLE_IN                : in  std_logic;                      --trigger enable flag
     --Debug
     DEBUG_OUT                    : out std_logic_vector (15 downto 0)
     );