From: Michael Boehmer Date: Fri, 4 Nov 2022 07:35:10 +0000 (+0100) Subject: working point. DHCP, ARP, PING, SCTRL seem to work. X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=74a7a6858b0bfc04890973192b0dae8f27a043f9;p=trb3sc.git working point. DHCP, ARP, PING, SCTRL seem to work. --- diff --git a/gbe_hub/structure.txt b/gbe_hub/structure.txt index 0024431..b18702b 100644 --- a/gbe_hub/structure.txt +++ b/gbe_hub/structure.txt @@ -4,7 +4,7 @@ trb3sc_gbe_hub ++> clock_reset_handler ++> reset_handler | ++> gbe_logic_wrapper ++> gbe_main_control ++> gbe_protocol_selector ++> gbe_response_constructor_ARP | | ++> gbe_response_constructor_DHCP | | ++> gbe_response_constructor_Ping - | | ++> gbe_response_constructor_SCTRL + | | ++> gbe_response_constructor_SCTRL +-> fifo_2kx9x18_wcnt | | ++> gbe_response_constructor_Forward | +-> gbe_transmit_control | +-> gbe_frame_constr diff --git a/gbe_hub/trb3sc_gbe_hub.lpf b/gbe_hub/trb3sc_gbe_hub.lpf index 3454395..6cccc8e 100644 --- a/gbe_hub/trb3sc_gbe_hub.lpf +++ b/gbe_hub/trb3sc_gbe_hub.lpf @@ -1,9 +1,9 @@ # locate the PCS blocks -LOCATE COMP "THE_GBE_MED_PCSA/gbe_serdes/PCSD_INST" SITE "PCSA"; -LOCATE COMP "THE_GBE_MED_PCSB/gbe_serdes/PCSD_INST" SITE "PCSB"; -LOCATE COMP "THE_GBE_MED_PCSC/gbe_serdes/PCSD_INST" SITE "PCSC"; -LOCATE COMP "THE_GBE_MED_PCSD/gbe_serdes/PCSD_INST" SITE "PCSD"; +LOCATE COMP "THE_GBE_MED_PCSA/THE_GBE_SERDES/PCSD_INST" SITE "PCSA"; +LOCATE COMP "THE_GBE_MED_PCSB/THE_GBE_SERDES/PCSD_INST" SITE "PCSB"; +LOCATE COMP "THE_GBE_MED_PCSC/THE_GBE_SERDES/PCSD_INST" SITE "PCSC"; +LOCATE COMP "THE_GBE_MED_PCSD/THE_GBE_SERDES/PCSD_INST" SITE "PCSD"; # main frequencies @@ -14,10 +14,10 @@ FREQUENCY NET "GBE/clk_125_rx_from_pcs[0]" 125.0 MHz; # read from SCI can be delayed due to long read strobe -MULTICYCLE FROM ASIC THE_GBE_MED_PCSA/gbe_serdes/PCSD_INST PIN SCIRDATA* 15 ns; -MULTICYCLE FROM ASIC THE_GBE_MED_PCSB/gbe_serdes/PCSD_INST PIN SCIRDATA* 15 ns; -MULTICYCLE FROM ASIC THE_GBE_MED_PCSC/gbe_serdes/PCSD_INST PIN SCIRDATA* 15 ns; -MULTICYCLE FROM ASIC THE_GBE_MED_PCSD/gbe_serdes/PCSD_INST PIN SCIRDATA* 15 ns; +MULTICYCLE FROM ASIC THE_GBE_MED_PCSA/THE_GBE_SERDES/PCSD_INST PIN SCIRDATA* 15 ns; +MULTICYCLE FROM ASIC THE_GBE_MED_PCSB/THE_GBE_SERDES/PCSD_INST PIN SCIRDATA* 15 ns; +MULTICYCLE FROM ASIC THE_GBE_MED_PCSC/THE_GBE_SERDES/PCSD_INST PIN SCIRDATA* 15 ns; +MULTICYCLE FROM ASIC THE_GBE_MED_PCSD/THE_GBE_SERDES/PCSD_INST PIN SCIRDATA* 15 ns; ################################################################################################## diff --git a/gbe_hub/trb3sc_gbe_hub.vhd b/gbe_hub/trb3sc_gbe_hub.vhd index 553669a..b93c6dc 100644 --- a/gbe_hub/trb3sc_gbe_hub.vhd +++ b/gbe_hub/trb3sc_gbe_hub.vhd @@ -229,6 +229,8 @@ architecture trb3sc_gbe_hub_arch of trb3sc_gbe_hub is signal oob_2_reg : std_logic_vector(31 downto 0); signal oob_3_reg : std_logic_vector(31 downto 0); + signal debug_wrapper : std_logic_vector(31 downto 0); + begin -- SerDes usage: @@ -418,7 +420,7 @@ begin -- 8 : fifo_eof -- 7..0: data --- DBG(31 downto 0) <= debug_pcsd(31 downto 0); + DBG(31 downto 0) <= debug_wrapper(31 downto 0); DBG(32) <= '0'; DBG(33) <= master_clk; @@ -451,7 +453,6 @@ begin port map( CLK_125_IN => master_clk, RESET => reset_i, - GSR_N => reset_n_i, -- we connect to FIFO interface directly -- FIFO interface TX (send frames) FIFO_DATA_OUT => dl_rx_data(0)(8 downto 0), @@ -467,8 +468,7 @@ begin MAC_RX_EOF_IN => sniffer_eof, MAC_RX_ERROR_IN => sniffer_error, -- - PCS_AN_READY_IN => link_active, -- check here - LINK_ACTIVE_IN => link_active, -- check here + LINK_ACTIVE_IN => link_active, -- unique adresses MC_UNIQUE_ID_IN => timer.uid, MY_TRBNET_ADDRESS_IN => timer.network_address, @@ -493,7 +493,7 @@ begin MAKE_RESET_OUT => reset_via_gbe, -- debug STATUS_OUT => status, - DEBUG_OUT => DBG(31 downto 0) --open + DEBUG_OUT => debug_wrapper --open ); -------------------------------------------------------------------------------