From: Manuel Penschuck <manuel.penschuck@stud.uni-frankfurt.de>
Date: Tue, 5 Nov 2013 08:06:39 +0000 (+0100)
Subject: Doc for CTS AddOn and multiple EB support
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=765bb6db7c0fd7c3c9789b3a5b931c169e6b39cc;p=daqdocu.git

Doc for CTS AddOn and multiple EB support
---

diff --git a/trb3/CtsBuildingBlocks.tex b/trb3/CtsBuildingBlocks.tex
index 563a94f..e362011 100644
--- a/trb3/CtsBuildingBlocks.tex
+++ b/trb3/CtsBuildingBlocks.tex
@@ -121,6 +121,9 @@
       \label{ref:cts_subsubevent_example}
    \end{table}   
 
+\subsubsection{Multiple Event Builders}
+   The CTS supports multiple event builders using a simple \emph{round-robing} scheme. If 
+   
 \newpage
    
 \subsection{Trigger Logic}   
@@ -179,6 +182,24 @@
    input module, a delay line is built from a 15~bit shift register and a multiplexer used to select the required
    delay.
 
+\subsubsection{AddOn Input module}
+\label{sec:cts_addon_input_module}
+   As the number of ITCs is limited to 16, it is not possible to map each input of the CTS AddOn directly to an dedicated
+   trigger channel. Thus, a number of multiplexer modules can be used to select inputs from the CTS AddOn:
+   \begin{itemize*}
+      \item \texttt{JECLIN}: Four differential ECL inputs, all connected via a RJ45 jack
+      \item \texttt{JIN1}, \texttt{JIN2}: Two times four differential LVDS inputs connected via two RJ45 jacks
+      \item \texttt{NIMIN1}, \texttt{NIMIN2}: Two NIM inputs
+   \end{itemize*}
+   
+   The output of each multiplexer is connected to an input module (see section \ref{sec:cts_bb_input_module}), which offers
+   statistics and filter capabilities. In fact, the AddOn inputs are processed by the CTS as ordinary input channels: 
+   If synthesised with $N=~$\texttt{TRIGGER\_INPUT\_COUNT} input channels and $M=$~\texttt{TRIGGER\_ADDON\_COUNT} AddOn inputs,
+   the enumeration processes yields $N+M$ input modules. The same goes for the data sent to the event builders. The AddOn inputs
+   are always mapped into the upper $M$ slots.
+   
+   The multiplexer introduces an deterministic delay of two system clock cycles, i.e. 20~ns. 
+   
 \subsubsection{Coincidence detection}
 \label{sec:cts_bb_trigger_logic_coin}
    \begin{figure}[h]
diff --git a/trb3/CtsSlowControl.tex b/trb3/CtsSlowControl.tex
index 69c592a..ea544a1 100644
--- a/trb3/CtsSlowControl.tex
+++ b/trb3/CtsSlowControl.tex
@@ -45,7 +45,7 @@
 
    \begin{table}
       \begin{center}\small
-         \begin{spacing}{1.1}
+         %\begin{spacing}{1.1}
             \begin{tabularx}{\textwidth}{|l|r@{}@{}c@{}@{}l|lX|} \hline
                \multicolumn{1}{|c|}{\textbf{Address}} &
                \multicolumn{3}{c|}{\textbf{Bit(s)}} &
@@ -119,8 +119,14 @@
                &  \addr{~9} & : & \addr{~0} & &{Maximal number of events accepted per millisecond}\\
                & \multicolumn{3}{c|}{\addr{10}} & &{Throttle enabled}\\
                & \multicolumn{3}{c|}{\addr{31}} & &{Stop Trigger}\\ \hline
+               \addr{0xa00d}
+               & &&& \multicolumn{2}{X|}{Event Builder selection} \\
+               & \addr{15} &:& \addr{~0} & &   Event Builder mask (default: 0x1) \\
+               & \addr{23} &:& \addr{16} & &   Number of events before selecting next builder (useful to aggregate events to support large data packets) \\
+               & \addr{27} &:& \addr{24} & &   Event Builder number of calibration trigger \\
+               & \multicolumn{3}{c|}{\addr{28}} & &  Use special event builder for \addr{0xe} trigger, otherwise use ordinary round robin selection. \\\hline
             \end{tabularx}
-         \end{spacing}
+         %\end{spacing}
          \caption[CTS Register with fixed address]{Registers with fixed addresses, i.e. controlled by the network logic domain}
          \label{tab:cts_register_block}
       \end{center}
@@ -160,6 +166,10 @@
       multiple registers. Thus, you should not compare two absolute figures obtained from a single memory dump. 
       The later source of uncertainty does not occur when using the counters sent to the event builders.
 
+      \item \textbf{\addr{0x12} AddOn Input Multiplexer}. This block is only present, when the CTS was synthesised with
+      atleast one AddOn Input Multiplexer. It contains one word per module, which is interpreted as an unsigned index for
+      the multiplexer. The mapping is defined in table \ref{tab:cts_addon_input_mapping}.
+      
       \item \textbf{\addr{0x20} Coincidence Configuration}. Each coincidence detection module (see
 ~\ref{sec:cts_bb_trigger_logic_coin}) has one configuration register. Thus, the number of registers
       inside this block matches the number of \texttt{COIN}s.
@@ -188,6 +198,34 @@
       The MSB holds the error flag.
   
    \end{itemize}
+
+   \begin{table}
+      \begin{center}\small
+         \begin{tabular}{|r|l|}\hline
+            \textbf{Input Number} & \textbf{Input Description} \\\hline\hline
+            0 & \texttt{jeclin[0]}\\
+            1 & \texttt{jeclin[1]}\\
+            2 & \texttt{jeclin[2]}\\
+            3 & \texttt{jeclin[3]}\\\hline
+
+            4 & \texttt{jin1[0]}\\
+            5 & \texttt{jin1[1]}\\
+            6 & \texttt{jin1[2]}\\
+            7 & \texttt{jin1[3]}\\\hline
+
+            8 & \texttt{jin2[0]}\\
+            9 & \texttt{jin2[1]}\\
+            10 & \texttt{jin2[2]}\\
+            11 & \texttt{jin2[3]}\\\hline
+
+            12 & \texttt{nimin1}\\
+            13 & \texttt{nimin2}\\\hline
+         \end{tabular}
+         \caption{CTS AddOn Input Mapping}
+         \label{tab:cts_addon_input_mapping}
+      \end{center}
+   \end{table}       
+   
    
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