From: Cahit Date: Tue, 25 Apr 2017 19:35:27 +0000 (+0200) Subject: solved conflicts X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=78113a065340a3b3ff08a6c3261bb5e69b44de0b;p=dirich.git solved conflicts --- 78113a065340a3b3ff08a6c3261bb5e69b44de0b diff --cc dirich/config.vhd index 30cc46c,813c7b0..170f969 --- a/dirich/config.vhd +++ b/dirich/config.vhd @@@ -9,12 -9,14 +9,16 @@@ package config i ------------------------------------------------------------------------------ --Begin of design configuration ------------------------------------------------------------------------------ + + constant DIRICH_VERSION : integer := 2; --1 or 2. + --TDC settings - constant NUM_TDC_MODULES : integer range 1 to 4 := 1; -- number of tdc modules to implement - constant NUM_TDC_CHANNELS : integer range 1 to 65 := 16; -- number of tdc channels per module - constant NUM_TDC_CHANNELS_POWER2 : integer range 0 to 6 := 4; --the nearest power of two, for convenience reasons - constant DOUBLE_EDGE_TYPE : integer range 0 to 3 := 3; --double edge type: 0, 1, 2, 3 ++ + constant BOARD : string := "dirich"; -- Options: dirich, trb3 + constant NUM_TDC_MODULES : integer range 1 to 4 := 1; -- number of tdc modules to implement + constant NUM_TDC_CHANNELS : integer range 1 to 65 := 5; -- number of tdc channels per module + constant NUM_TDC_CHANNELS_POWER2 : integer range 0 to 6 := 5; --the nearest power of two, for convenience reasons + constant DOUBLE_EDGE_TYPE : integer range 0 to 3 := 3; --double edge type: 0, 1, 2, 3 -- 0: single edge only, -- 1: same channel, -- 2: alternating channels,