From: Michael Boehmer Date: Mon, 8 Aug 2022 22:26:09 +0000 (+0200) Subject: cleanup, working DLM in both directions X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=7a83edcc3aa2d100ed4c7589881e9751b77dd7c2;p=TOMcat.git cleanup, working DLM in both directions --- diff --git a/gbe/tomcat_gbe.vhd b/gbe/tomcat_gbe.vhd index f8ebc2d..94ebf55 120000 --- a/gbe/tomcat_gbe.vhd +++ b/gbe/tomcat_gbe.vhd @@ -1 +1 @@ -tomcat_gbe_d0ch0_d1ch1.vhd \ No newline at end of file +tomcat_gbe_d1ch1_d0ch0.vhd \ No newline at end of file diff --git a/gbe/tomcat_gbe_d0ch0_d1ch1.vhd b/gbe/tomcat_gbe_d0ch0_d1ch1.vhd index 861cce7..fd72582 100644 --- a/gbe/tomcat_gbe_d0ch0_d1ch1.vhd +++ b/gbe/tomcat_gbe_d0ch0_d1ch1.vhd @@ -188,21 +188,24 @@ architecture arch of tomcat_gbe is signal sgl_debug : std_logic_vector(15 downto 0); signal blink_counter : unsigned(9 downto 0); - + signal oob_reg_0_int : std_logic_vector(31 downto 0); signal oob_reg_1_int : std_logic_vector(31 downto 0); signal oob_reg_2_int : std_logic_vector(31 downto 0); signal oob_reg_3_int : std_logic_vector(31 downto 0); - + signal dlm_found_int : std_logic; signal dlm_inject_int : std_logic; signal dlm_tx_data_int : std_logic_vector(7 downto 0); signal dlm_rx_data_int : std_logic_vector(7 downto 0); - + signal dlm_ctr : unsigned(23 downto 0); signal rst_dlm_ctr_x : std_logic; signal rst_dlm_ctr : std_logic; - + + signal dlm_tag_ctr : unsigned(7 downto 0); + signal inc_dlm_tag : std_logic; + begin --------------------------------------------------------------------------- @@ -238,8 +241,8 @@ begin LED_GREEN_OUT => open ); - --------------------------------------------------------------------------- +-- LED blink generator --------------------------------------------------------------------------- THE_BLINK_COUNTER_PROC: process( clk_sys ) begin @@ -250,12 +253,13 @@ begin end if; end process THE_BLINK_COUNTER_PROC; ---------------------------------------------------------------------------- --------------------------------------------------------------------------- -- DLM timing generator +--------------------------------------------------------------------------- THE_DLM_SEND_PROC: process( clk_sys ) begin if( rising_edge(clk_sys) ) then + inc_dlm_tag <= rst_dlm_ctr; rst_dlm_ctr <= rst_dlm_ctr_x; if( (reset_i = '1') or (rst_dlm_ctr = '1') or (aux_reg(31) = '0') ) then dlm_ctr <= (others => '0'); @@ -267,12 +271,25 @@ end process THE_DLM_SEND_PROC; rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) and (aux_reg(31) = '1')) else '0'; +-- DLM "tag" for blinking LEDs :) +THE_DLM_TAG_CTR_PROC: process( clk_sys ) +begin + if( rising_edge(clk_sys) ) then + if( (reset_i = '1') or (aux_reg(31) = '0') ) then + dlm_tag_ctr <= (others => '0'); + elsif( inc_dlm_tag = '1' ) then + dlm_tag_ctr <= dlm_tag_ctr + 1; + end if; + end if; +end process THE_DLM_TAG_CTR_PROC; + --------------------------------------------------------------------------- -- GbE interface (SFP) --------------------------------------------------------------------------- GBE_SFP_INTERFACE: entity gbe_med_fifo generic map( - SERDES_NUM => 0 + SERDES_NUM => 0, + INCLUDE_DLM => 1 ) port map( RESET => reset_i, @@ -323,7 +340,8 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an --------------------------------------------------------------------------- GBE_COPPER_INTERFACE: entity gbe_med_fifo generic map( - SERDES_NUM => 3 + SERDES_NUM => 3, + INCLUDE_DLM => 1 ) port map( RESET => reset_i, @@ -364,7 +382,7 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an ); dlm_inject_int <= rst_dlm_ctr; - dlm_tx_data_int <= control_reg(7 downto 0); + dlm_tx_data_int <= std_logic_vector(dlm_tag_ctr); --------------------------------------------------------------------------- --------------------------------------------------------------------------- @@ -393,29 +411,6 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an DEBUG => sgl_debug --open ); --- debug(19..0) are on INTCOM --- debug(33..20) are on GPIO --- 33 = CLK2 (white/green) --- 32 = CLK1 (white/blue) - --- debug(7 downto 0) <= ul_rx_data(7 downto 0); --- debug(15 downto 8) <= ul_tx_data(7 downto 0); --- debug(16) <= ul_rx_data(9); --- debug(17) <= ul_tx_data(9); --- debug(18) <= ul_rx_data(10); --- debug(19) <= ul_tx_data(10); --- debug(20) <= ul_rx_data(8); --- debug(21) <= ul_tx_data(8); --- debug(22) <= ul_rx_frame_req; --- debug(23) <= ul_rx_frame_ack; --- debug(24) <= ul_rx_frame_avail; --- debug(25) <= dl_rx_frame_req(0); --- debug(26) <= dl_rx_frame_ack(0); --- debug(27) <= dl_rx_frame_avail(0); --- debug(31 downto 28) <= sgl_debug(3 downto 0); --- debug(32) <= dl_rx_port_mux(1); --- debug(33) <= clk_sys; - --------------------------------------------------------------------------- -- Multiplexers for data streams --------------------------------------------------------------------------- @@ -687,10 +682,10 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an LED_SFP_GREEN <= not (status(0) and status(1) and status(2)); --'0'; LED_SFP_YELLOW <= not status(5); --'0'; LED_SFP_RED <= not status(6); --'0'; - LED(3) <= not std_logic(blink_counter(6)); --additional_reg(7); --'0'; - LED(2) <= not dlm_rx_data_int(2); --additional_reg(6); --'0'; - LED(1) <= not dlm_rx_data_int(1); --additional_reg(5); --'0'; - LED(0) <= not dlm_rx_data_int(0); --additional_reg(4); --'0'; + LED(3) <= not std_logic(blink_counter(8)); --additional_reg(7); --'0'; + LED(2) <= not dlm_rx_data_int(7); --additional_reg(6); --'0'; + LED(1) <= not dlm_rx_data_int(6); --additional_reg(5); --'0'; + LED(0) <= not dlm_rx_data_int(5); --additional_reg(4); --'0'; -- 0 red -- 1 orange @@ -701,6 +696,33 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an ----------------------------------------------------------------------------------------------- ----------------------------------------------------------------------------------------------- +--------------------------------------------------------------------------- +--------------------------------------------------------------------------- +-- debug(19..0) are on INTCOM +-- debug(33..20) are on GPIO +-- 33 = CLK2 (white/green) +-- 32 = CLK1 (white/blue) + +-- debug(7 downto 0) <= ul_rx_data(7 downto 0); +-- debug(15 downto 8) <= ul_tx_data(7 downto 0); +-- debug(16) <= ul_rx_data(9); +-- debug(17) <= ul_tx_data(9); +-- debug(18) <= ul_rx_data(10); +-- debug(19) <= ul_tx_data(10); +-- debug(20) <= ul_rx_data(8); +-- debug(21) <= ul_tx_data(8); +-- debug(22) <= ul_rx_frame_req; +-- debug(23) <= ul_rx_frame_ack; +-- debug(24) <= ul_rx_frame_avail; +-- debug(25) <= dl_rx_frame_req(0); +-- debug(26) <= dl_rx_frame_ack(0); +-- debug(27) <= dl_rx_frame_avail(0); +-- debug(31 downto 28) <= sgl_debug(3 downto 0); +-- debug(32) <= dl_rx_port_mux(1); +-- debug(33) <= clk_sys; +--------------------------------------------------------------------------- +--------------------------------------------------------------------------- + --------------------------------------------------------------------------- --------------------------------------------------------------------------- -- debug(19..0) are on INTCOM diff --git a/gbe/tomcat_gbe_d1ch1_d0ch0.vhd b/gbe/tomcat_gbe_d1ch1_d0ch0.vhd index dd37aa9..0bd14c1 100644 --- a/gbe/tomcat_gbe_d1ch1_d0ch0.vhd +++ b/gbe/tomcat_gbe_d1ch1_d0ch0.vhd @@ -188,12 +188,12 @@ architecture arch of tomcat_gbe is signal sgl_debug : std_logic_vector(15 downto 0); signal blink_counter : unsigned(9 downto 0); - + signal oob_reg_0_int : std_logic_vector(31 downto 0); signal oob_reg_1_int : std_logic_vector(31 downto 0); signal oob_reg_2_int : std_logic_vector(31 downto 0); signal oob_reg_3_int : std_logic_vector(31 downto 0); - + signal dlm_found_int : std_logic; signal dlm_inject_int : std_logic; signal dlm_tx_data_int : std_logic_vector(7 downto 0); @@ -203,6 +203,9 @@ architecture arch of tomcat_gbe is signal rst_dlm_ctr_x : std_logic; signal rst_dlm_ctr : std_logic; + signal dlm_tag_ctr : unsigned(7 downto 0); + signal inc_dlm_tag : std_logic; + begin --------------------------------------------------------------------------- @@ -238,8 +241,8 @@ begin LED_GREEN_OUT => open ); - --------------------------------------------------------------------------- +-- LED blink generator --------------------------------------------------------------------------- THE_BLINK_COUNTER_PROC: process( clk_sys ) begin @@ -250,12 +253,13 @@ begin end if; end process THE_BLINK_COUNTER_PROC; ---------------------------------------------------------------------------- --------------------------------------------------------------------------- -- DLM timing generator +--------------------------------------------------------------------------- THE_DLM_SEND_PROC: process( clk_sys ) begin if( rising_edge(clk_sys) ) then + inc_dlm_tag <= rst_dlm_ctr; rst_dlm_ctr <= rst_dlm_ctr_x; if( (reset_i = '1') or (rst_dlm_ctr = '1') or (aux_reg(31) = '0') ) then dlm_ctr <= (others => '0'); @@ -267,12 +271,25 @@ end process THE_DLM_SEND_PROC; rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) and (aux_reg(31) = '1')) else '0'; +-- DLM "tag" for blinking LEDs :) +THE_DLM_TAG_CTR_PROC: process( clk_sys ) +begin + if( rising_edge(clk_sys) ) then + if( (reset_i = '1') or (aux_reg(31) = '0') ) then + dlm_tag_ctr <= (others => '0'); + elsif( inc_dlm_tag = '1' ) then + dlm_tag_ctr <= dlm_tag_ctr + 1; + end if; + end if; +end process THE_DLM_TAG_CTR_PROC; + --------------------------------------------------------------------------- -- GbE interface (SFP) --------------------------------------------------------------------------- GBE_SFP_INTERFACE: entity gbe_med_fifo generic map( - SERDES_NUM => 3 + SERDES_NUM => 3, + INCLUDE_DLM => 1 ) port map( RESET => reset_i, @@ -317,7 +334,7 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an ); dlm_inject_int <= rst_dlm_ctr; - dlm_tx_data_int <= control_reg(7 downto 0); + dlm_tx_data_int <= std_logic_vector(dlm_tag_ctr); debug(127 downto 64) <= (others => '0'); @@ -326,7 +343,8 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an --------------------------------------------------------------------------- GBE_COPPER_INTERFACE: entity gbe_med_fifo generic map( - SERDES_NUM => 0 + SERDES_NUM => 0, + INCLUDE_DLM => 1 ) port map( RESET => reset_i, @@ -393,29 +411,6 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an DEBUG => sgl_debug --open ); --- debug(19..0) are on INTCOM --- debug(33..20) are on GPIO --- 33 = CLK2 (white/green) --- 32 = CLK1 (white/blue) - --- debug(7 downto 0) <= ul_rx_data(7 downto 0); --- debug(15 downto 8) <= ul_tx_data(7 downto 0); --- debug(16) <= ul_rx_data(9); --- debug(17) <= ul_tx_data(9); --- debug(18) <= ul_rx_data(10); --- debug(19) <= ul_tx_data(10); --- debug(20) <= ul_rx_data(8); --- debug(21) <= ul_tx_data(8); --- debug(22) <= ul_rx_frame_req; --- debug(23) <= ul_rx_frame_ack; --- debug(24) <= ul_rx_frame_avail; --- debug(25) <= dl_rx_frame_req(0); --- debug(26) <= dl_rx_frame_ack(0); --- debug(27) <= dl_rx_frame_avail(0); --- debug(31 downto 28) <= sgl_debug(3 downto 0); --- debug(32) <= dl_rx_port_mux(1); --- debug(33) <= clk_sys; - --------------------------------------------------------------------------- -- Multiplexers for data streams --------------------------------------------------------------------------- @@ -687,10 +682,10 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an LED_SFP_GREEN <= not (status(0) and status(1) and status(2)); --'0'; LED_SFP_YELLOW <= not status(5); --'0'; LED_SFP_RED <= not status(6); --'0'; - LED(3) <= not std_logic(blink_counter(9)); --additional_reg(7); --'0'; - LED(2) <= not dlm_rx_data_int(2); --additional_reg(6); --'0'; - LED(1) <= not dlm_rx_data_int(1); --additional_reg(5); --'0'; - LED(0) <= not dlm_rx_data_int(0); --additional_reg(4); --'0'; + LED(3) <= not std_logic(blink_counter(8)); --additional_reg(7); --'0'; + LED(2) <= not dlm_rx_data_int(7); --additional_reg(6); --'0'; + LED(1) <= not dlm_rx_data_int(6); --additional_reg(5); --'0'; + LED(0) <= not dlm_rx_data_int(5); --additional_reg(4); --'0'; -- 0 red -- 1 orange @@ -701,6 +696,33 @@ rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) an ----------------------------------------------------------------------------------------------- ----------------------------------------------------------------------------------------------- +--------------------------------------------------------------------------- +--------------------------------------------------------------------------- +-- debug(19..0) are on INTCOM +-- debug(33..20) are on GPIO +-- 33 = CLK2 (white/green) +-- 32 = CLK1 (white/blue) + +-- debug(7 downto 0) <= ul_rx_data(7 downto 0); +-- debug(15 downto 8) <= ul_tx_data(7 downto 0); +-- debug(16) <= ul_rx_data(9); +-- debug(17) <= ul_tx_data(9); +-- debug(18) <= ul_rx_data(10); +-- debug(19) <= ul_tx_data(10); +-- debug(20) <= ul_rx_data(8); +-- debug(21) <= ul_tx_data(8); +-- debug(22) <= ul_rx_frame_req; +-- debug(23) <= ul_rx_frame_ack; +-- debug(24) <= ul_rx_frame_avail; +-- debug(25) <= dl_rx_frame_req(0); +-- debug(26) <= dl_rx_frame_ack(0); +-- debug(27) <= dl_rx_frame_avail(0); +-- debug(31 downto 28) <= sgl_debug(3 downto 0); +-- debug(32) <= dl_rx_port_mux(1); +-- debug(33) <= clk_sys; +--------------------------------------------------------------------------- +--------------------------------------------------------------------------- + --------------------------------------------------------------------------- --------------------------------------------------------------------------- -- debug(19..0) are on INTCOM