From: hadeshyp Date: Fri, 5 Oct 2007 15:08:46 +0000 (+0000) Subject: optimizations to various files, Jan X-Git-Tag: oldGBE~692 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=7d4f8cd8213e72b08bb6a6ba5835f5df53112712;p=trbnet.git optimizations to various files, Jan --- diff --git a/trb_net16_base_api.vhd b/trb_net16_base_api.vhd index 1d6c0a5..76fea0e 100644 --- a/trb_net16_base_api.vhd +++ b/trb_net16_base_api.vhd @@ -10,8 +10,8 @@ entity trb_net16_base_api is generic (API_TYPE : integer := 0; -- type of api: 0 passive, 1 active --FIFO size is given in 2^(n+1) 64Bit-packets i.e. 2^(n+3) 16bit packets - FIFO_TO_INT_DEPTH : integer := 0; -- direction to medium - FIFO_TO_APL_DEPTH : integer := 0; -- direction to application + FIFO_TO_INT_DEPTH : integer := 1; -- direction to medium + FIFO_TO_APL_DEPTH : integer := 1; -- direction to application FIFO_TERM_BUFFER_DEPTH : integer := 0); -- fifo for auto-answering master path -- if set to 0, no buffer is used @@ -154,9 +154,11 @@ architecture trb_net16_base_api_arch of trb_net16_base_api is component trb_net16_term is generic ( - FIFO_TERM_BUFFER_DEPTH : integer := 0 -- fifo for auto-answering of - -- the master path, if set to 0 - -- no buffer is used at all + FIFO_TERM_BUFFER_DEPTH : integer := FIFO_TERM_BUFFER_DEPTH; + -- fifo for auto-answering of the master path, if set to 0 no buffer is used at all + SECURE_MODE : integer range 0 to 1 := 0 + --if secure_mode is not used, apl must provide error pattern and dtype until + --next trigger comes in. In secure mode these must be available when hold_trm goes low ); port( -- Misc @@ -240,18 +242,17 @@ architecture trb_net16_base_api_arch of trb_net16_base_api is signal combined_trailer_F1, combined_trailer_F2, combined_trailer_F3 : std_logic_vector(15 downto 0); signal next_registered_trailer_F1, next_registered_trailer_F2, next_registered_trailer_F3 : std_logic_vector(15 downto 0); signal registered_trailer_F1, registered_trailer_F2, registered_trailer_F3 : std_logic_vector(15 downto 0); + signal current_combined_header, current_registered_trailer, current_combined_trailer, current_data : std_logic_vector(15 downto 0); signal update_registered_trailer: std_logic; signal master_counter : std_logic_vector(1 downto 0); - + signal out_enable : std_logic_vector(1 downto 0); begin --------------------------------------- -- termination for active api --------------------------------------- TrbNetTerm: trb_net16_term - generic map( - FIFO_TERM_BUFFER_DEPTH => 0) port map( CLK => CLK, RESET => RESET, @@ -407,9 +408,7 @@ begin ); sbuf_free <= sbuf_next_READ; - next_registered_trailer_F1 <= combined_trailer_F1; - next_registered_trailer_F2 <= combined_trailer_F2; - next_registered_trailer_F3 <= combined_trailer_F3; + next_APL_DATA_OUT <= fifo_to_apl_data_out; next_APL_PACKET_NUM_OUT <= fifo_to_apl_packet_num_out; @@ -428,59 +427,54 @@ begin end if; end process; --create comb. real packet type - current_fifo_to_apl_packet_type <= fifo_to_apl_data_out(2 downto 0) when (fifo_to_apl_packet_num_out = "00" and RESET = '0') + current_fifo_to_apl_packet_type <= fifo_to_apl_data_out(2 downto 0) when (fifo_to_apl_packet_num_out = "00") else saved_fifo_to_apl_packet_type; --------------------------------------- -- select data for int direction --------------------------------------- - process (out_select, combined_header_F1, combined_header_F2, - combined_header_F3, registered_trailer_F1, registered_trailer_F2, - registered_trailer_F3, fifo_to_int_data_out, combined_trailer_F1, - combined_trailer_F2, combined_trailer_F3, master_counter) - begin - if out_select = HDR then - if master_counter = "00" then - next_INT_MASTER_DATA_OUT <= (others => '0'); - next_INT_MASTER_DATA_OUT(2 downto 0) <= TYPE_HDR; - elsif master_counter = "01" then - next_INT_MASTER_DATA_OUT <= combined_header_F1; - elsif master_counter = "10" then - next_INT_MASTER_DATA_OUT <= combined_header_F2; - elsif master_counter = "11" then - next_INT_MASTER_DATA_OUT <= combined_header_F3; - end if; - elsif out_select = TRM then - if master_counter = "00" then - next_INT_MASTER_DATA_OUT <= (others => '0'); - next_INT_MASTER_DATA_OUT(2 downto 0) <= TYPE_TRM; - elsif master_counter = "01" then - next_INT_MASTER_DATA_OUT <= registered_trailer_F1; - elsif master_counter = "10" then - next_INT_MASTER_DATA_OUT <= registered_trailer_F2; - elsif master_counter = "11" then - next_INT_MASTER_DATA_OUT <= registered_trailer_F3; - end if; - elsif out_select = TRM_COMB then - if master_counter = "00" then - next_INT_MASTER_DATA_OUT <= (others => '0'); - next_INT_MASTER_DATA_OUT(2 downto 0) <= TYPE_TRM; - elsif master_counter = "01" then - next_INT_MASTER_DATA_OUT <= combined_trailer_F1; - elsif master_counter = "10" then - next_INT_MASTER_DATA_OUT <= combined_trailer_F2; - elsif master_counter = "11" then - next_INT_MASTER_DATA_OUT <= combined_trailer_F3; - end if; - else - if master_counter = "00" then - next_INT_MASTER_DATA_OUT <= (others => '0'); - next_INT_MASTER_DATA_OUT(2 downto 0) <= TYPE_DAT; - else - next_INT_MASTER_DATA_OUT <= fifo_to_int_data_out; - end if; - end if; - end process; + + + process(current_combined_header, current_registered_trailer, current_combined_trailer, current_data, out_select) + begin + case out_select is + when HDR => next_INT_MASTER_DATA_OUT <= current_combined_header; + when TRM => next_INT_MASTER_DATA_OUT <= current_registered_trailer; + when TRM_COMB => next_INT_MASTER_DATA_OUT <= current_combined_trailer; + when DAT => next_INT_MASTER_DATA_OUT <= current_data; + when others => next_INT_MASTER_DATA_OUT <= current_data; + end case; + end process; + + + + process(master_counter, fifo_to_int_data_out, combined_header_F1, registered_trailer_F1, + combined_trailer_F1, combined_header_F2, registered_trailer_F2, combined_trailer_F2, + combined_header_F3, registered_trailer_F3, combined_trailer_F3) + begin + case master_counter is + when "01" => + current_combined_header <= combined_header_F1; + current_registered_trailer <= registered_trailer_F1; + current_combined_trailer <= combined_trailer_F1; + current_data <= fifo_to_int_data_out; + when "10" => + current_combined_header <= combined_header_F2; + current_registered_trailer <= registered_trailer_F2; + current_combined_trailer <= combined_trailer_F2; + current_data <= fifo_to_int_data_out; + when "11" => + current_combined_header <= combined_header_F3; + current_registered_trailer <= registered_trailer_F3; + current_combined_trailer <= combined_trailer_F3; + current_data <= fifo_to_int_data_out; + when others => + current_combined_header <= "0000000000000" & TYPE_HDR; + current_registered_trailer <= "0000000000000" & TYPE_TRM; + current_combined_trailer <= "0000000000000" & TYPE_TRM; + current_data <= "0000000000000" & TYPE_DAT; + end case; + end process; next_INT_MASTER_PACKET_NUM_OUT <= master_counter; @@ -563,35 +557,28 @@ begin -- RUNNING ------------------------------------------------------------------------------- elsif current_state = RUNNING then + if sbuf_free = '1' then + fifo_to_int_read <= '1'; + end if; if APL_SEND_IN = '0' then -- terminate the transfer + update_registered_trailer <= '1'; if fifo_to_int_empty = '1' then -- immediate stop next_INT_MASTER_DATAREADY_OUT <= '1'; if master_counter = "11" then - update_registered_trailer <= '1'; next_state <= SEND_TRAILER; out_select <= TRM_COMB; end if; else next_state <= SHUTDOWN; - update_registered_trailer <= '1'; if sbuf_free = '1' then next_INT_MASTER_DATAREADY_OUT <= '1'; - out_select <= DAT; - if master_counter /= "00" then - fifo_to_int_read <= '1'; - end if; end if; end if; else -- APL_SEND_IN: still running next_state <= RUNNING; - out_select <= DAT; if fifo_to_int_empty = '0' and sbuf_free = '1' then - -- data words have to be prepared + -- data words have to be prepared next_INT_MASTER_DATAREADY_OUT <= '1'; - - if master_counter /= "00" then - fifo_to_int_read <= '1'; - end if; end if; -- fifo_to_int_empty = '0' end if; ------------------------------------------------------------------------------- @@ -600,13 +587,10 @@ begin elsif current_state = SHUTDOWN then next_state <= SHUTDOWN; if sbuf_free = '1' then + fifo_to_int_read <= '1'; if fifo_to_int_empty = '0' then -- data words have to be prepared next_INT_MASTER_DATAREADY_OUT <= '1'; - out_select <= DAT; - if master_counter /= "00" then - fifo_to_int_read <= '1'; - end if; else -- we are done --implicit: fill with padding words @@ -630,6 +614,7 @@ begin next_INT_MASTER_DATAREADY_OUT <= '0'; if API_TYPE = 0 then --here is the end of the passive transfer next_sequence_counter <= sequence_counter +1; + next_slave_running <= '0'; end if; else next_state <= SEND_TRAILER; @@ -657,11 +642,11 @@ begin if (reg_APL_DATAREADY_OUT = '1' and APL_READ_IN = '1') or fifo_to_apl_packet_num_out = "00" then -- valid read - if fifo_to_apl_empty = '0' then - fifo_to_apl_read <= '1'; - end if; - if (reg_APL_TYP_OUT = TYPE_TRM or reg_APL_TYP_OUT = TYPE_HDR) then - next_slave_running <= '1'; + fifo_to_apl_read <= not fifo_to_apl_empty; + if API_TYPE = 0 then + if (reg_APL_TYP_OUT = TYPE_TRM or reg_APL_TYP_OUT = TYPE_HDR) then + next_slave_running <= '1'; + end if; end if; if reg_APL_TYP_OUT = TYPE_TRM and reg_APL_PACKET_NUM_OUT= "11" and (APL_READ_IN = '1' and reg_APL_DATAREADY_OUT = '1') then --fifo_to_apl_read = '1' @@ -674,7 +659,9 @@ begin -- MISSING: SEQNR check -- OPEN QUESTION: Address matching? makes sense for a reply transfer? end if; - + if master_counter = "00" or fifo_to_int_empty = '1' then + fifo_to_int_read <= '0'; + end if; end process; CLK_REG: process(CLK) @@ -768,9 +755,9 @@ begin registered_trailer_F2 <= (others => '0'); registered_trailer_F3 <= (others => '0'); elsif update_registered_trailer = '1' then - registered_trailer_F1 <= next_registered_trailer_F1; - registered_trailer_F2 <= next_registered_trailer_F2; - registered_trailer_F3 <= next_registered_trailer_F3; + registered_trailer_F1 <= combined_trailer_F1; + registered_trailer_F2 <= combined_trailer_F2; + registered_trailer_F3 <= combined_trailer_F3; else registered_trailer_F1 <= registered_trailer_F1; registered_trailer_F2 <= registered_trailer_F2; diff --git a/trb_net16_fifo.vhd b/trb_net16_fifo.vhd index f3b561a..90eebba 100644 --- a/trb_net16_fifo.vhd +++ b/trb_net16_fifo.vhd @@ -16,7 +16,7 @@ entity trb_net16_fifo is generic ( DATA_WIDTH : integer := 16; -- FIFO word width NUM_WIDTH : integer := 2; - DEPTH : integer := 5 -- Depth of the FIFO, 2^(n+1) 64Bit packets + DEPTH : integer := 1 -- Depth of the FIFO, 2^(n+1) 64Bit packets ); port ( CLK : in std_logic; diff --git a/trb_net16_ibuf.vhd b/trb_net16_ibuf.vhd index 0e8a68a..5e0bd0f 100644 --- a/trb_net16_ibuf.vhd +++ b/trb_net16_ibuf.vhd @@ -10,7 +10,7 @@ use work.trb_net_std.all; entity trb_net16_ibuf is generic ( - DEPTH : integer := 3 + DEPTH : integer := 1 ); port( -- Misc @@ -110,7 +110,8 @@ architecture trb_net16_ibuf_arch of trb_net16_ibuf is signal tmp_INT_DATAREADY_OUT: std_logic; signal tmp_INT_DATA_OUT: std_logic_vector(15 downto 0); signal tmp_INT_PACKET_NUM_OUT: std_logic_vector(1 downto 0); - signal current_last_header, next_last_header : std_logic_vector(50 downto 0); + signal current_last_header, next_last_header : std_logic_vector(47 downto 0); + --last_header does not contain the TYPE_HDR, only packets 1 to 3 are stored. type ERROR_STATE is (IDLE, GOT_OVERFLOW_ERROR, GOT_LOCKED_ERROR, GOT_UNDEFINED_ERROR); signal current_error_state, next_error_state : ERROR_STATE; @@ -151,6 +152,7 @@ begin end if; end if; end process; + process(CLK) begin if rising_edge(CLK) then @@ -162,10 +164,10 @@ begin end if; end process; --create comb. real packet type - current_packet_type <= MED_DATA_IN(2 downto 0) when (MED_PACKET_NUM_IN = "00" and RESET = '0') + current_packet_type <= MED_DATA_IN(2 downto 0) when (MED_PACKET_NUM_IN = "00") else saved_packet_type; - current_fifo_packet_type <= fifo_data_out(2 downto 0) when (fifo_packet_num_out = "00" and RESET = '0') - else saved_fifo_packet_type; + current_fifo_packet_type <= fifo_data_out(2 downto 0) when (fifo_packet_num_out = "00") + else saved_fifo_packet_type; FILTER_DATAREADY_IN : process(MED_DATA_IN, MED_DATAREADY_IN, MED_ERROR_IN, MED_PACKET_NUM_IN, @@ -179,15 +181,13 @@ begin next_error_state <= current_error_state; if MED_DATAREADY_IN = '1' and reg_read_out= '1' then if current_packet_type = TYPE_ACK then - -- BUGBUG: this causes trouble if the IBUF is full -> ack sent even if buffer overflow - if MED_PACKET_NUM_IN = "00" then + if MED_PACKET_NUM_IN = "00" and current_error_state /= GOT_OVERFLOW_ERROR then got_ack_internal <= '1'; end if; if MED_PACKET_NUM_IN = "10" then next_rec_buffer_size_out <= MED_DATA_IN(3 downto 0); end if; - -- elsif fifo_full = '0' and is_locked = '0' then - elsif fifo_full = '0' then -- still ACKs may come even when locked + elsif fifo_full = '0' then fifo_write <= '1'; next_read_out <= '1'; elsif fifo_full = '1' then @@ -244,53 +244,45 @@ begin DATA_OUT : process (INT_HEADER_IN, fifo_data_out, current_last_header, INT_READ_IN, release_locked, is_locked, sbuf_free, fifo_empty, - fifo_packet_num_out, current_fifo_packet_type) + fifo_packet_num_out, current_fifo_packet_type) begin tmp_INT_DATA_OUT <= fifo_data_out; tmp_INT_PACKET_NUM_OUT <= fifo_packet_num_out; tmp_INT_DATAREADY_OUT <= '0'; got_eob_out <= '0'; - fifo_read <= '0'; got_locked <= is_locked; next_last_header <= current_last_header; - + if fifo_empty = '0' and (sbuf_free = '1' or current_fifo_packet_type = TYPE_EOB) then + fifo_read <= '1'; + else + fifo_read <= '0'; + end if; if fifo_empty = '0' then - if sbuf_free = '1' and current_fifo_packet_type = TYPE_DAT then - -- next data word can be registered + if sbuf_free = '1' then tmp_INT_DATAREADY_OUT <= '1'; - fifo_read <= '1'; - elsif sbuf_free = '1' and current_fifo_packet_type = TYPE_TRM then - if fifo_packet_num_out = "11" then - got_eob_out <= '1'; --exactly when buffer is killed + if current_fifo_packet_type = TYPE_TRM then + if fifo_packet_num_out = "11" then + got_eob_out <= '1'; --exactly when buffer is killed + end if; + got_locked <= is_locked or not release_locked; end if; - tmp_INT_DATAREADY_OUT <= '1'; - if release_locked = '0' then - got_locked <= '1'; + end if; + if current_fifo_packet_type = TYPE_EOB then + tmp_INT_DATAREADY_OUT <= '0'; + if fifo_packet_num_out = "11" then + got_eob_out <= '1'; end if; - fifo_read <= '1'; - elsif sbuf_free = '1' and current_fifo_packet_type = TYPE_HDR then - if fifo_packet_num_out = "00" then - next_last_header(50 downto 48) <= fifo_data_out(2 downto 0); - elsif fifo_packet_num_out = "01" then + end if; + if current_fifo_packet_type = TYPE_HDR then + if fifo_packet_num_out = "01" then next_last_header(47 downto 32) <= fifo_data_out; elsif fifo_packet_num_out = "10" then next_last_header(31 downto 16) <= fifo_data_out; else next_last_header(15 downto 0) <= fifo_data_out; end if; - tmp_INT_DATAREADY_OUT <= '1'; - fifo_read <= '1'; - elsif current_fifo_packet_type = TYPE_EOB then - fifo_read <= '1'; - if fifo_packet_num_out = "11" then - got_eob_out <= '1'; - end if; - tmp_INT_DATAREADY_OUT <= '0'; - -- this should happen only one CLK cycle end if; - else - tmp_INT_DATAREADY_OUT <= '0'; - end if; + end if; end process; --BUGBUG HDR retransmit needed @@ -307,11 +299,7 @@ begin reg_eob_out <= '0'; current_last_header <= (others => '0'); elsif CLK_EN = '1' then - if release_locked = '1' then - is_locked <= '0'; - else - is_locked <= got_locked; - end if; + is_locked <= got_locked and not release_locked; reg_eob_out <= got_eob_out; current_last_header <= next_last_header; else diff --git a/trb_net16_iobuf.vhd b/trb_net16_iobuf.vhd index 87c7479..57ae824 100644 --- a/trb_net16_iobuf.vhd +++ b/trb_net16_iobuf.vhd @@ -13,8 +13,8 @@ use work.trb_net_std.all; entity trb_net16_iobuf is generic ( --FIFO size is given in 2^(n+1) 64Bit-packets i.e. 2^(n+3) 16bit packets - INIT_DEPTH : integer := 2; - REPLY_DEPTH : integer := 2); + INIT_DEPTH : integer := 1; + REPLY_DEPTH : integer := 1); port( -- Misc CLK : in std_logic; @@ -374,12 +374,11 @@ begin -- listen to REPLYIBUF itself if REPLYIBUF_stat_locked(0) = '1' then next_REPLY_IS_LOCKED <= '1'; - INITOBUF_ctrl_locked(0) <= '1'; + INITOBUF_ctrl_locked(0) <= '1'; else next_REPLY_IS_LOCKED <= '0'; end if; end if; - if INIT_IS_LOCKED = '1' then -- listen to REPLYOBUF if REPLYOBUF_stat_locked(0) = '1' or CTRL_LOCKED(0) = '1' then @@ -392,10 +391,9 @@ begin -- listen to INITIBUF itself if INITIBUF_stat_locked(0) = '1' then next_INIT_IS_LOCKED <= '1'; - REPLYOBUF_ctrl_locked(0) <= '1'; + REPLYOBUF_ctrl_locked(0) <= '1'; else next_INIT_IS_LOCKED <= '0'; - end if; end if; diff --git a/trb_net16_obuf.vhd b/trb_net16_obuf.vhd index 2c94fa7..58779b6 100644 --- a/trb_net16_obuf.vhd +++ b/trb_net16_obuf.vhd @@ -88,8 +88,6 @@ architecture trb_net16_obuf_arch of trb_net16_obuf is signal is_locked, got_locked,release_locked : std_logic; - type transfer_state_t is (IDLE, SENDING_DATA, SENDING_ACK, SENDING_EOB); - signal transfer_state, next_transfer_state : transfer_state_t; signal transfer_counter : std_logic_vector(1 downto 0); signal saved_packet_type : std_logic_vector(2 downto 0); @@ -122,7 +120,7 @@ begin sbuf_free <= comb_next_read; send_ACK <= SEND_ACK_IN or reg_SEND_ACK_IN; - send_DATA <= '1' when (TRANSMITTED_BUFFERS(1) = '0') else '0'; + send_DATA <= not TRANSMITTED_BUFFERS(1);--'1' when (TRANSMITTED_BUFFERS(1) = '0') else '0'; send_EOB <= '1' when (CURRENT_DATA_COUNT = max_DATA_COUNT_minus_one) else '0'; @@ -179,30 +177,24 @@ begin --since we count only 64Bit packets, each counter is updated on the last packet --the EOB and ACK flags must be available when the last packet is sent. --full buffers (despite the sbuf) can only occur on the last packet. - COMB_NEXT_TRANSFER : process(transfer_state, comb_dataready, transfer_counter, current_NOP_word, + COMB_NEXT_TRANSFER : process(comb_dataready, transfer_counter, current_NOP_word, CURRENT_DATA_COUNT, reg_SEND_ACK_IN, INT_DATAREADY_IN, INT_DATA_IN, reg_INT_READ_OUT, reg_SEND_ACK_IN, saved_packet_type, current_DATA_word, send_ACK, send_EOB, sbuf_free, - current_ACK_word, current_EOB_word, send_DATA, + current_ACK_word, current_EOB_word, max_DATA_COUNT_minus_two, next_TRANSMITTED_BUFFERS) begin - if transfer_counter = "11" and comb_dataready = '1' then - next_transfer_state <= IDLE; - else - next_transfer_state <= transfer_state; - end if; current_output_data_buffer <= current_NOP_word; current_output_num_buffer <= transfer_counter; next_INT_READ_OUT <= '1'; increase_TRANSMITTED_BUFFERS <= '0'; next_DATA_COUNT <= CURRENT_DATA_COUNT; - next_SEND_ACK_IN <= reg_SEND_ACK_IN; + next_SEND_ACK_IN <= send_ACK; comb_dataready <= '0'; if (reg_INT_READ_OUT = '1' and INT_DATAREADY_IN = '1') then --can only happen if idle or sending_data - next_transfer_state <= SENDING_DATA; current_output_data_buffer <= current_DATA_word; comb_dataready <= '1'; --I hope sbuf can store if transfer_counter = "11" then @@ -212,40 +204,35 @@ begin else next_DATA_COUNT <= CURRENT_DATA_COUNT +1; end if; - end if; - if (send_ACK = '1' or send_EOB = '1' ) then - if transfer_counter = "11" then --finish running packet, then stop. - next_INT_READ_OUT <= '0'; + if (send_ACK = '1' or send_EOB = '1' ) then + next_INT_READ_OUT <= '0'; end if; end if; if send_ACK = '1' then --BUGBUG: next_SEND_ACK_IN should be a counter (2 may arrive) --no real problem due to same speed of transmission next_SEND_ACK_IN <= '1'; end if; - elsif (send_ACK = '1' or transfer_state = SENDING_ACK) then - if not (transfer_counter = "11" and comb_dataready = '1') then - next_transfer_state <= SENDING_ACK; - end if; + elsif (send_ACK = '1') then next_INT_READ_OUT <= '0'; + current_output_data_buffer <= current_ACK_word; if sbuf_free = '1' then - current_output_data_buffer <= current_ACK_word; - next_SEND_ACK_IN <= '0'; comb_dataready <= '1'; + if (transfer_counter = "11") then + next_SEND_ACK_IN <= '0'; + end if; end if; - elsif send_EOB = '1' or transfer_state = SENDING_EOB then - if not (transfer_counter = "11" and comb_dataready = '1') then - next_transfer_state <= SENDING_EOB; - else - next_DATA_COUNT <= (others => '0'); - increase_TRANSMITTED_BUFFERS <= '1'; - end if; + elsif send_EOB = '1' then next_INT_READ_OUT <= '0'; + current_output_data_buffer <= current_EOB_word; if sbuf_free = '1' then - current_output_data_buffer <= current_EOB_word; comb_dataready <= '1'; + if (transfer_counter = "11") then + next_DATA_COUNT <= (others => '0'); + increase_TRANSMITTED_BUFFERS <= '1'; + end if; end if; end if; - if send_data = '0' or --block reading if two buffers have been sent or current buffer runs full + if --block reading if two buffers have been sent or current buffer runs full ((current_DATA_COUNT(DATA_COUNT_WIDTH-1 downto 0) = (max_DATA_COUNT_minus_two(DATA_COUNT_WIDTH-1 downto 0))) and reg_INT_READ_OUT = '1' and INT_DATAREADY_IN = '1' and transfer_counter = "11") --long version of (next_count = max_count-1) @@ -263,12 +250,10 @@ begin reg_SEND_ACK_IN <= '0'; CURRENT_DATA_COUNT <= (others => '0'); reg_INT_READ_OUT <= '0'; - transfer_state <= IDLE; elsif CLK_EN = '1' then reg_SEND_ACK_IN <= next_SEND_ACK_IN; CURRENT_DATA_COUNT <= next_DATA_COUNT; reg_INT_READ_OUT <= next_INT_READ_OUT; - transfer_state <= next_transfer_state; end if; end if; end process; @@ -278,11 +263,9 @@ begin "01111" when REC_BUFFER_SIZE_IN="0011" else "11111" when REC_BUFFER_SIZE_IN="0100" else "00001"; - next_max_DATA_COUNT_minus_two <= "00010" when REC_BUFFER_SIZE_IN="0001" else - "00110" when REC_BUFFER_SIZE_IN="0010" else - "01110" when REC_BUFFER_SIZE_IN="0011" else - "11110" when REC_BUFFER_SIZE_IN="0100" else - "00000"; + next_max_DATA_COUNT_minus_two(0) <= '0'; + next_max_DATA_COUNT_minus_two(DATA_COUNT_WIDTH-1 downto 1) + <= next_max_DATA_COUNT_minus_one(DATA_COUNT_WIDTH-1 downto 1); -- next_max_DATA_COUNT_minus_one <= "0000000000000011" when REC_BUFFER_SIZE_IN="0001" else -- "0000000000000111" when REC_BUFFER_SIZE_IN="0010" else @@ -333,15 +316,11 @@ begin comb_locked : process (MED_READ_IN, saved_packet_type, transfer_counter, release_locked, is_locked) begin -- process - got_locked <= is_locked; + got_locked <= is_locked and not release_locked; if MED_READ_IN = '1' then if saved_packet_type = TYPE_TRM and transfer_counter = "11" and release_locked = '0' then got_locked <= '1'; - elsif release_locked = '1' then - got_locked <= '0'; end if; - elsif release_locked = '1' then - got_locked <= '0'; end if; end process; diff --git a/trb_net16_term.vhd b/trb_net16_term.vhd index 13c5c76..c2140b3 100644 --- a/trb_net16_term.vhd +++ b/trb_net16_term.vhd @@ -2,6 +2,8 @@ -- for a description see HADES wiki -- http://hades-wiki.gsi.de/cgi-bin/view/DaqSlowControl/TrbNetTerm +--can only be used in combination with term_ibuf -> no check for packet type! + LIBRARY IEEE; USE IEEE.std_logic_1164.ALL; USE IEEE.std_logic_ARITH.ALL; @@ -12,9 +14,12 @@ use work.trb_net_std.all; entity trb_net16_term is generic ( - FIFO_TERM_BUFFER_DEPTH : integer := 0 -- fifo for auto-answering of + FIFO_TERM_BUFFER_DEPTH : integer := 0; -- fifo for auto-answering of -- the master path, if set to 0 -- no buffer is used at all + SECURE_MODE : integer range 0 to 1 := 1 + --if secure_mode is not used, apl must provide error pattern and dtype until + --next trigger comes in. In secure mode these must be available when hold_trm goes low ); port( -- Misc @@ -37,8 +42,8 @@ entity trb_net16_term is APL_ERROR_PATTERN_OUT: out std_logic_vector (31 downto 0); -- see NewTriggerBusNetworkDescr APL_SEQNR_OUT: out std_logic_vector (7 downto 0); APL_GOT_TRM: out std_logic; - APL_HOLD_TRM: in std_logic; + --the trigger is released as soon as HOLD_TRM is low -> keep high if idle APL_DTYPE_IN: in std_logic_vector (3 downto 0); -- see NewTriggerBusNetworkDescr APL_ERROR_PATTERN_IN: in std_logic_vector (31 downto 0); -- see NewTriggerBusNetworkDescr APL_MY_ADDRESS_IN: in std_logic_vector (15 downto 0) -- My own address (temporary solution!!!) @@ -49,34 +54,20 @@ end entity; architecture trb_net16_term_arch of trb_net16_term is signal next_APL_DTYPE_OUT, reg_APL_DTYPE_OUT: std_logic_vector(3 downto 0); - signal next_APL_ERROR_PATTERN_OUT, reg_APL_ERROR_PATTERN_OUT: std_logic_vector(31 downto 0); + signal reg_APL_ERROR_PATTERN_OUT, next_APL_ERROR_PATTERN_OUT: std_logic_vector(31 downto 0); signal next_APL_SEQNR_OUT, reg_APL_SEQNR_OUT: std_logic_vector(7 downto 0); signal next_APL_GOT_TRM, reg_APL_GOT_TRM: std_logic; - signal reg_APL_DTYPE_IN : std_logic_vector(3 downto 0); - signal reg_APL_ERROR_PATTERN_IN: std_logic_vector(31 downto 0); - - signal fifo_term_buffer_data_in : std_logic_vector(15 downto 0); - signal fifo_term_buffer_write : std_logic; - signal fifo_term_buffer_data_out : std_logic_vector(15 downto 0); - signal fifo_term_buffer_read : std_logic; - signal fifo_term_buffer_full : std_logic; - signal fifo_term_buffer_empty : std_logic; - signal fifo_term_buffer_packet_num_in : std_logic_vector(1 downto 0); - signal fifo_term_buffer_packet_num_out : std_logic_vector(1 downto 0); + signal reg_APL_DTYPE_IN, buf_APL_DTYPE_IN : std_logic_vector(3 downto 0); + signal reg_APL_ERROR_PATTERN_IN, buf_APL_ERROR_PATTERN_IN: std_logic_vector(31 downto 0); - type TERM_BUFFER_STATE is (IDLE, SENDING_HEADER, RUNNING, SEND_TRAILER, MY_ERROR); - signal tb_current_state, tb_next_state : TERM_BUFFER_STATE; - - signal tb_registered_target, tb_next_registered_target : std_logic_vector(15 downto 0); signal current_packet_type, saved_packet_type : std_logic_vector(2 downto 0); - signal reg_F1, next_F1 : std_logic_vector(15 downto 0); - signal reg_F2, next_F2 : std_logic_vector(15 downto 0); - signal reg_F3, next_F3 : std_logic_vector(15 downto 0); - signal transfer_counter : std_logic_vector(1 downto 0); + signal transfer_counter, next_transfer_counter : std_logic_vector(1 downto 0); signal send_trm, next_send_trm : std_logic; - signal buf_INT_DATAREADY_OUT : std_logic; + signal buf_INT_DATAREADY_OUT, next_INT_DATAREADY_OUT : std_logic; + signal buf_INT_DATA_OUT, next_INT_DATA_OUT : std_logic_vector(15 downto 0); + begin @@ -86,23 +77,20 @@ begin APL_GOT_TRM <= reg_APL_GOT_TRM; INT_READ_OUT <= not send_trm and not reg_APL_GOT_TRM; - process(RESET, reg_APL_ERROR_PATTERN_OUT, reg_APL_DTYPE_OUT, reg_APL_SEQNR_OUT, reg_APL_GOT_TRM, current_packet_type, - INT_PACKET_NUM_IN, INT_DATA_IN, APL_HOLD_TRM, send_trm, reg_APL_ERROR_PATTERN_OUT, reg_APL_DTYPE_IN, - transfer_counter, INT_READ_IN) + process(RESET, reg_APL_DTYPE_OUT, reg_APL_SEQNR_OUT, reg_APL_GOT_TRM, current_packet_type, + INT_PACKET_NUM_IN, INT_DATA_IN, APL_HOLD_TRM, send_trm, + transfer_counter, INT_READ_IN, saved_packet_type, buf_APL_ERROR_PATTERN_IN, buf_APL_DTYPE_IN) begin - next_APL_ERROR_PATTERN_OUT <= reg_APL_ERROR_PATTERN_OUT; + --next_APL_ERROR_PATTERN_OUT <= reg_APL_ERROR_PATTERN_OUT; next_APL_DTYPE_OUT <= reg_APL_DTYPE_OUT; next_APL_SEQNR_OUT <= reg_APL_SEQNR_OUT; next_APL_GOT_TRM <= reg_APL_GOT_TRM; next_send_trm <= '0'; - buf_INT_DATAREADY_OUT <= '0'; - INT_DATA_OUT <= (others => '0'); - if current_packet_type = TYPE_TRM then - if INT_PACKET_NUM_IN = "01" then - next_APL_ERROR_PATTERN_OUT(31 downto 16) <= INT_DATA_IN; - elsif INT_PACKET_NUM_IN = "10" then - next_APL_ERROR_PATTERN_OUT(15 downto 0) <= INT_DATA_IN; - elsif INT_PACKET_NUM_IN = "11" then + next_INT_DATAREADY_OUT <= '0'; + --next_INT_DATA_OUT <= buf_INT_DATA_OUT; + next_transfer_counter <= transfer_counter; + if saved_packet_type = TYPE_TRM then + if INT_PACKET_NUM_IN = "11" then next_APL_DTYPE_OUT <= INT_DATA_IN(3 downto 0); next_APL_SEQNR_OUT <= INT_DATA_IN(11 downto 4); next_APL_GOT_TRM <= '1'; @@ -110,40 +98,47 @@ begin end if; if (reg_APL_GOT_TRM = '1' and APL_HOLD_TRM = '0') or send_trm = '1' then next_APL_GOT_TRM <= '0'; - if transfer_counter = "11" and INT_READ_IN = '1' then + if transfer_counter = "10" and INT_READ_IN = '1' then next_send_trm <= '0'; else next_send_trm <= '1'; end if; - buf_INT_DATAREADY_OUT <= '1'; - if transfer_counter = "00" then - INT_DATA_OUT <= (others => '0'); - INT_DATA_OUT(2 downto 0) <= TYPE_TRM; - elsif transfer_counter = "01" then - INT_DATA_OUT <= reg_APL_ERROR_PATTERN_OUT(31 downto 16); - elsif transfer_counter = "10" then - INT_DATA_OUT <= reg_APL_ERROR_PATTERN_OUT(15 downto 0); - else - INT_DATA_OUT(15 downto 12)<= (others => '0'); - INT_DATA_OUT(11 downto 4) <= reg_APL_SEQNR_OUT; - INT_DATA_OUT(3 downto 0) <= reg_APL_DTYPE_IN; - end if; + next_INT_DATAREADY_OUT <= '1'; + end if; + if transfer_counter = "11" then + next_INT_DATA_OUT <= (others => '0'); + next_INT_DATA_OUT(2 downto 0) <= TYPE_TRM; + elsif transfer_counter = "00" then + next_INT_DATA_OUT <= buf_APL_ERROR_PATTERN_IN(31 downto 16); + elsif transfer_counter = "01" then + next_INT_DATA_OUT <= buf_APL_ERROR_PATTERN_IN(15 downto 0); + else + next_INT_DATA_OUT(15 downto 12)<= (others => '0'); + next_INT_DATA_OUT(11 downto 4) <= reg_APL_SEQNR_OUT; + next_INT_DATA_OUT(3 downto 0) <= buf_APL_DTYPE_IN; end if; end process; - --save data from api while sending trailer + --save data from api while sending trailer in secure mode + SECURE_GEN: if SECURE_MODE = 1 generate CLK_REG2: process(CLK) begin if rising_edge(CLK) then if RESET = '1' then - reg_APL_DTYPE_IN <= (others => '0'); - reg_APL_ERROR_PATTERN_IN <= (others => '0'); + buf_APL_DTYPE_IN <= (others => '0'); + buf_APL_ERROR_PATTERN_IN <= (others => '0'); elsif APL_HOLD_TRM = '0' and send_trm = '0' then - reg_APL_DTYPE_IN <= APL_DTYPE_IN; - reg_APL_ERROR_PATTERN_IN <= APL_ERROR_PATTERN_IN; + buf_APL_DTYPE_IN <= APL_DTYPE_IN; + buf_APL_ERROR_PATTERN_IN <= APL_ERROR_PATTERN_IN; end if; end if; end process; + end generate; + + SECURE_GEN2: if SECURE_MODE = 0 generate + buf_APL_ERROR_PATTERN_IN <= APL_ERROR_PATTERN_IN; + buf_APL_DTYPE_IN <= APL_DTYPE_IN; + end generate; --count packets REG_TRANSFER_COUNTER : process(CLK) @@ -158,8 +153,22 @@ begin end process; INT_DATAREADY_OUT <= buf_INT_DATAREADY_OUT; + INT_DATA_OUT <= buf_INT_DATA_OUT; INT_PACKET_NUM_OUT <= transfer_counter; - + INT_OUT_REG: process(CLK) + begin + if rising_edge(CLK) then + if RESET = '1' then + buf_INT_DATA_OUT <= (others => '0'); + buf_INT_DATAREADY_OUT <= '0'; + --transfer_counter <= "00"; + else + buf_INT_DATA_OUT <= next_INT_DATA_OUT; + buf_INT_DATAREADY_OUT <= next_INT_DATAREADY_OUT; + --transfer_counter <= next_transfer_counter; + end if; + end if; + end process; --this holds the current packet type process(CLK) @@ -167,15 +176,15 @@ begin if rising_edge(CLK) then if RESET = '1' or (INT_PACKET_NUM_IN = "11" and INT_DATAREADY_IN = '1') then saved_packet_type <= "111"; - elsif INT_PACKET_NUM_IN = "00" and INT_DATAREADY_IN = '1' then + elsif INT_PACKET_NUM_IN = "00" then saved_packet_type <= INT_DATA_IN(2 downto 0); end if; end if; end process; --create comb. real packet type - current_packet_type <= INT_DATA_IN(2 downto 0) when (INT_PACKET_NUM_IN = "00" and INT_DATAREADY_IN = '1' and RESET = '0') - else saved_packet_type; +-- current_packet_type <= INT_DATA_IN(2 downto 0) when (INT_PACKET_NUM_IN = "00") +-- else saved_packet_type; CLK_REG: process(CLK) @@ -184,18 +193,39 @@ begin if RESET = '1' then reg_APL_GOT_TRM <= '0'; reg_APL_DTYPE_OUT <= (others => '0'); - reg_APL_ERROR_PATTERN_OUT <= (others => '0'); + --reg_APL_ERROR_PATTERN_OUT <= (others => '0'); reg_APL_SEQNR_OUT <= (others => '0'); send_trm <= '0'; else reg_APL_GOT_TRM <= next_APL_GOT_TRM; reg_APL_DTYPE_OUT <= next_APL_DTYPE_OUT; - reg_APL_ERROR_PATTERN_OUT <= next_APL_ERROR_PATTERN_OUT; + --reg_APL_ERROR_PATTERN_OUT <= next_APL_ERROR_PATTERN_OUT; reg_APL_SEQNR_OUT <= next_APL_SEQNR_OUT; send_trm <= next_send_trm; end if; end if; end process; + ERROROUT1_REG: process(CLK) + begin + if rising_edge(CLK) then + if RESET = '1' then + reg_APL_ERROR_PATTERN_OUT(31 downto 16) <= (others => '0'); + elsif INT_PACKET_NUM_IN = "01" then + reg_APL_ERROR_PATTERN_OUT(31 downto 16) <= INT_DATA_IN; + end if; + end if; + end process; + ERROROUT2_REG: process(CLK) + begin + if rising_edge(CLK) then + if RESET = '1' then + reg_APL_ERROR_PATTERN_OUT(15 downto 0) <= (others => '0'); + elsif INT_PACKET_NUM_IN = "10" then + reg_APL_ERROR_PATTERN_OUT(15 downto 0) <= INT_DATA_IN; + end if; + end if; + end process; + end architecture; diff --git a/trb_net16_term_ibuf.vhd b/trb_net16_term_ibuf.vhd index da099ad..0df636d 100644 --- a/trb_net16_term_ibuf.vhd +++ b/trb_net16_term_ibuf.vhd @@ -15,6 +15,11 @@ use work.trb_net_std.all; entity trb_net16_term_ibuf is + generic( + DATA_WIDTH : integer := 16; + NUM_WIDTH : integer := 2; + VERSION : integer range 0 to 1 := 0 + ); port( -- Misc CLK : in std_logic; @@ -22,15 +27,15 @@ entity trb_net16_term_ibuf is CLK_EN : in std_logic; -- Media direction port MED_DATAREADY_IN: in std_logic; -- Data word is offered by the Media (the IOBUF MUST read) - MED_DATA_IN: in std_logic_vector (15 downto 0); -- Data word - MED_PACKET_NUM_IN :in std_logic_vector(1 downto 0); + MED_DATA_IN: in std_logic_vector (DATA_WIDTH-1 downto 0); -- Data word + MED_PACKET_NUM_IN :in std_logic_vector(NUM_WIDTH-1 downto 0); MED_READ_OUT: out std_logic; -- buffer reads a word from media MED_ERROR_IN: in std_logic_vector (2 downto 0); -- Status bits -- Internal direction port INT_HEADER_IN: in std_logic; -- Concentrator kindly asks to resend the last header INT_DATAREADY_OUT: out std_logic; - INT_DATA_OUT: out std_logic_vector (15 downto 0); -- Data word - INT_PACKET_NUM_OUT:out std_logic_vector(1 downto 0); + INT_DATA_OUT: out std_logic_vector (DATA_WIDTH-1 downto 0); -- Data word + INT_PACKET_NUM_OUT:out std_logic_vector(NUM_WIDTH-1 downto 0); INT_READ_IN: in std_logic; INT_ERROR_OUT: out std_logic_vector (2 downto 0); -- Status bits -- Status and control port @@ -44,9 +49,9 @@ architecture trb_net16_term_ibuf_arch of trb_net16_term_ibuf is component trb_net16_sbuf is generic ( - DATA_WIDTH : integer := 16; - NUM_WIDTH : integer := 2; - VERSION : integer := 0 + DATA_WIDTH : integer := DATA_WIDTH; + NUM_WIDTH : integer := NUM_WIDTH; + VERSION : integer := VERSION ); port( -- Misc @@ -74,8 +79,8 @@ architecture trb_net16_term_ibuf_arch of trb_net16_term_ibuf is signal got_eob_out, reg_eob_out: std_logic; signal sbuf_free, comb_next_read: std_logic; signal tmp_INT_DATAREADY_OUT: std_logic; - signal tmp_INT_DATA_OUT: std_logic_vector(15 downto 0); - signal tmp_INT_PACKET_NUM_OUT: std_logic_vector(1 downto 0); + signal tmp_INT_DATA_OUT: std_logic_vector(DATA_WIDTH-1 downto 0); + signal tmp_INT_PACKET_NUM_OUT: std_logic_vector(NUM_WIDTH-1 downto 0); type ERROR_STATE is (IDLE, GOT_OVERFLOW_ERROR, GOT_LOCKED_ERROR, GOT_UNDEFINED_ERROR); signal current_error_state, next_error_state : ERROR_STATE; signal next_rec_buffer_size_out, current_rec_buffer_size_out : std_logic_vector(3 downto 0); @@ -96,7 +101,7 @@ begin end if; end process; --create comb. real packet type - current_packet_type <= MED_DATA_IN(2 downto 0) when (MED_PACKET_NUM_IN = "00" and RESET = '0') + current_packet_type <= MED_DATA_IN(2 downto 0) when (MED_PACKET_NUM_IN = "00") else saved_packet_type; -- this process controls the writing of the media into the fifo @@ -108,8 +113,8 @@ begin got_ack_internal <= '0'; next_rec_buffer_size_out <= current_rec_buffer_size_out; next_error_state <= current_error_state; - tmp_INT_DATA_OUT <= (others => '1'); - tmp_INT_PACKET_NUM_OUT <= (others => '0'); + tmp_INT_DATA_OUT <= MED_DATA_IN;--(others => '0'); + tmp_INT_PACKET_NUM_OUT <= MED_PACKET_NUM_IN;--(others => '0'); tmp_INT_DATAREADY_OUT <= '0'; got_eob_out <= '0'; got_locked <= is_locked; @@ -128,24 +133,24 @@ begin got_locked <= '1'; end if; end if; - tmp_INT_DATA_OUT <= MED_DATA_IN; - tmp_INT_PACKET_NUM_OUT <= MED_PACKET_NUM_IN; tmp_INT_DATAREADY_OUT <= '1'; elsif current_packet_type = TYPE_EOB then if MED_PACKET_NUM_IN = "11" then got_eob_out <= '1'; end if; - elsif sbuf_free = '0' then - next_error_state <= GOT_OVERFLOW_ERROR; - elsif is_locked = '1' then + end if; + if is_locked = '1' and current_packet_type /= TYPE_ACK then next_error_state <= GOT_LOCKED_ERROR; end if; + if sbuf_free = '0' then + next_error_state <= GOT_OVERFLOW_ERROR; + end if; end if; end process; - MED_READ_OUT <= '1'; -- I always can read + MED_READ_OUT <= '1'; -- I always can read, since APL has to read always reg_buffer: process(CLK) begin @@ -158,10 +163,6 @@ begin current_rec_buffer_size_out <= next_rec_buffer_size_out; reg_ack_internal <= got_ack_internal; current_error_state <= next_error_state; - else - current_rec_buffer_size_out <= current_rec_buffer_size_out; - reg_ack_internal <= reg_ack_internal; - current_error_state <= current_error_state; end if; end if; end process; @@ -169,11 +170,6 @@ begin SBUF: trb_net16_sbuf - generic map ( - DATA_WIDTH => 16, - NUM_WIDTH => 2, - VERSION => 0 - ) port map ( CLK => CLK, RESET => RESET, @@ -200,15 +196,8 @@ begin is_locked <= '0'; reg_eob_out <= '0'; elsif CLK_EN = '1' then - if release_locked = '1' then - is_locked <= '0'; - else - is_locked <= got_locked; - end if; + is_locked <= got_locked and not release_locked; reg_eob_out <= got_eob_out; - else - is_locked <= is_locked; - reg_eob_out <= reg_eob_out; end if; end if; end process; diff --git a/trb_net16_trigger_receiver_endpoint.vhd b/trb_net16_trigger_receiver_endpoint.vhd new file mode 100644 index 0000000..b96daca --- /dev/null +++ b/trb_net16_trigger_receiver_endpoint.vhd @@ -0,0 +1,383 @@ +-- a trigger receiver - as simple as possible + +LIBRARY IEEE; +USE IEEE.std_logic_1164.ALL; +USE IEEE.std_logic_ARITH.ALL; +USE IEEE.std_logic_UNSIGNED.ALL; + +use work.trb_net_std.all; + +--Entity decalaration for clock generator +entity trb_net16_trigger_receiver_endpoint is + + generic ( + INIT_DEPTH : integer := 0; -- Depth of the FIFO, 2^(n+1), if + -- the initibuf + REPLY_DEPTH : integer := 1; -- or the replyibuf + MULT_WIDTH : integer := 1; + BUS_WIDTH : integer := 16; --not to be changed + NUM_WIDTH : integer := 2; --not to be changed + SECURE_MODE : integer := 0 -- if 0, error pattern and dtype must be valid until next + -- trigger comes in. if 1 these can be valid on falling edge of hold_trm only + ); + + port( + -- Misc + CLK : in std_logic; + RESET : in std_logic; + CLK_EN : in std_logic; + -- Media direction port + MED_DATAREADY_OUT: out std_logic; --Data word ready to be read out + --by the media (via the TrbNetIOMultiplexer) + MED_DATA_OUT: out std_logic_vector (BUS_WIDTH-1 downto 0); -- Data word + MED_PACKET_NUM_OUT:out std_logic_vector (NUM_WIDTH-1 downto 0); + MED_READ_IN: in std_logic; -- Media is reading + + MED_DATAREADY_IN: in std_logic; -- Data word is offered by the Media + -- (the IOBUF MUST read) + MED_DATA_IN: in std_logic_vector (BUS_WIDTH-1 downto 0); -- Data word + MED_PACKET_NUM_IN: in std_logic_vector (NUM_WIDTH-1 downto 0); + MED_READ_OUT: out std_logic; -- buffer reads a word from media + MED_ERROR_IN: in std_logic_vector (2 downto 0); -- Status bits + + APL_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0); + APL_GOT_TRIGGER_OUT : out std_logic; + APL_DTYPE_OUT : out std_logic_vector(3 downto 0); + APL_SEQNR_OUT : out std_logic_vector(7 downto 0); + APL_ERROR_PATTERN_IN : in std_logic_vector(31 downto 0); + APL_HOLD_IN : in std_logic; + APL_MY_ADDRESS_IN : in std_logic_vector (15 downto 0); -- My own address (temporary solution!!!) + + -- Status and control port => just coming from the iobuf for debugging + STAT_GEN: out std_logic_vector (31 downto 0); -- General Status + STAT_LOCKED: out std_logic_vector (31 downto 0); -- Status of the handshake and buffer control + STAT_INIT_BUFFER: out std_logic_vector (31 downto 0); -- Status of the handshake and buffer control + STAT_REPLY_BUFFER: out std_logic_vector (31 downto 0); -- General Status + STAT_api_control_signals: out std_logic_vector(31 downto 0); + STAT_MPLEX: out std_logic_vector(31 downto 0); + CTRL_GEN: in std_logic_vector (31 downto 0); + CTRL_LOCKED: in std_logic_vector (31 downto 0); + STAT_CTRL_INIT_BUFFER: in std_logic_vector (31 downto 0); + STAT_CTRL_REPLY_BUFFER: in std_logic_vector (31 downto 0); + MPLEX_CTRL: in std_logic_vector (31 downto 0); + API_STAT_FIFO_TO_INT: out std_logic_vector(31 downto 0); + API_STAT_FIFO_TO_APL: out std_logic_vector(31 downto 0) + ); +end entity; + +architecture trb_net16_trigger_receiver_endpoint_arch of trb_net16_trigger_receiver_endpoint is + + component trb_net16_iobuf is + generic (INIT_DEPTH : integer := INIT_DEPTH; -- Depth of the FIFO, 2^(n+1), if + -- the initibuf + REPLY_DEPTH : integer := REPLY_DEPTH); -- or the replyibuf + port( + -- Misc + CLK : in std_logic; + RESET : in std_logic; + CLK_EN : in std_logic; + -- Media direction port + MED_INIT_DATAREADY_OUT: out std_logic; --Data word ready to be read out + --by the media (via the TrbNetIOMultiplexer) + MED_INIT_DATA_OUT: out std_logic_vector (15 downto 0); -- Data word + MED_INIT_PACKET_NUM_OUT:out std_logic_vector (1 downto 0); + MED_INIT_READ_IN: in std_logic; -- Media is reading + MED_INIT_DATAREADY_IN: in std_logic; -- Data word is offered by the Media + -- (the IOBUF MUST read) + MED_INIT_DATA_IN: in std_logic_vector (15 downto 0); -- Data word + MED_INIT_PACKET_NUM_IN: in std_logic_vector (1 downto 0); + MED_INIT_READ_OUT: out std_logic; -- buffer reads a word from media + MED_INIT_ERROR_IN: in std_logic_vector (2 downto 0); -- Status bits + MED_REPLY_DATAREADY_OUT: out std_logic; --Data word ready to be read out + --by the media (via the TrbNetIOMultiplexer) + MED_REPLY_DATA_OUT: out std_logic_vector (15 downto 0); -- Data word + MED_REPLY_PACKET_NUM_OUT:out std_logic_vector (1 downto 0); + MED_REPLY_READ_IN: in std_logic; -- Media is reading + MED_REPLY_DATAREADY_IN: in std_logic; -- Data word is offered by the Media + -- (the IOBUF MUST read) + MED_REPLY_DATA_IN: in std_logic_vector (15 downto 0); -- Data word + MED_REPLY_PACKET_NUM_IN: in std_logic_vector (1 downto 0); + MED_REPLY_READ_OUT: out std_logic; -- buffer reads a word from media + MED_REPLY_ERROR_IN: in std_logic_vector (2 downto 0); -- Status bits + -- Internal direction port + INT_INIT_DATAREADY_OUT: out std_logic; + INT_INIT_DATA_OUT: out std_logic_vector (15 downto 0); -- Data word + INT_INIT_PACKET_NUM_OUT:out std_logic_vector (1 downto 0); + INT_INIT_READ_IN: in std_logic; + INT_INIT_DATAREADY_IN: in std_logic; + INT_INIT_DATA_IN: in std_logic_vector (15 downto 0); -- Data word + INT_INIT_PACKET_NUM_IN: in std_logic_vector (1 downto 0); + INT_INIT_READ_OUT: out std_logic; + INT_REPLY_HEADER_IN: in std_logic; -- Concentrator kindly asks to resend the last + -- header (only for the reply path) + INT_REPLY_DATAREADY_OUT: out std_logic; + INT_REPLY_DATA_OUT: out std_logic_vector (15 downto 0); -- Data word + INT_REPLY_PACKET_NUM_OUT:out std_logic_vector (1 downto 0); + INT_REPLY_READ_IN: in std_logic; + + INT_REPLY_DATAREADY_IN: in std_logic; + INT_REPLY_DATA_IN: in std_logic_vector (15 downto 0); -- Data word + INT_REPLY_PACKET_NUM_IN: in std_logic_vector (1 downto 0); + INT_REPLY_READ_OUT: out std_logic; + + -- Status and control port + STAT_GEN: out std_logic_vector (31 downto 0); -- General Status + STAT_LOCKED: out std_logic_vector (31 downto 0); -- Status of the handshake and buffer control + STAT_INIT_BUFFER: out std_logic_vector (31 downto 0); -- Status of the handshake and buffer control + STAT_REPLY_BUFFER: out std_logic_vector (31 downto 0); -- General Status + CTRL_GEN: in std_logic_vector (31 downto 0); + CTRL_LOCKED: in std_logic_vector (31 downto 0); + STAT_CTRL_INIT_BUFFER: in std_logic_vector (31 downto 0); + STAT_CTRL_REPLY_BUFFER: in std_logic_vector (31 downto 0) + ); + end component; + component trb_net16_io_multiplexer is + generic (BUS_WIDTH : integer := BUS_WIDTH; + MULT_WIDTH : integer := MULT_WIDTH); + port( + -- Misc + CLK : in std_logic; + RESET : in std_logic; + CLK_EN : in std_logic; + -- Media direction port + MED_DATAREADY_IN: in std_logic; + MED_DATA_IN: in std_logic_vector (BUS_WIDTH-1 downto 0); + -- highest bits are mult. + MED_PACKET_NUM_IN: in std_logic_vector (1 downto 0); + MED_READ_OUT: out std_logic; + MED_DATAREADY_OUT: out std_logic; + MED_DATA_OUT: out std_logic_vector (BUS_WIDTH-1 downto 0); + MED_PACKET_NUM_OUT:out std_logic_vector (1 downto 0); + MED_READ_IN: in std_logic; + -- Internal direction port + INT_DATAREADY_OUT: out std_logic_vector (2**MULT_WIDTH-1 downto 0); + INT_DATA_OUT: out std_logic_vector ((BUS_WIDTH)*(2**MULT_WIDTH)-1 downto 0); + INT_PACKET_NUM_OUT:out std_logic_vector (2*(2**MULT_WIDTH)-1 downto 0); + INT_READ_IN: in std_logic_vector (2**MULT_WIDTH-1 downto 0); + INT_DATAREADY_IN: in std_logic_vector (2**MULT_WIDTH-1 downto 0); + INT_DATA_IN: in std_logic_vector ((BUS_WIDTH)*(2**MULT_WIDTH)-1 downto 0); + INT_PACKET_NUM_IN: in std_logic_vector (2*(2**MULT_WIDTH)-1 downto 0); + INT_READ_OUT: out std_logic_vector (2**MULT_WIDTH-1 downto 0); + -- Status and control port + CTRL: in std_logic_vector (31 downto 0); + STAT: out std_logic_vector (31 downto 0) + ); + end component; + component trb_net16_term is + generic ( + FIFO_TERM_BUFFER_DEPTH : integer := 0; -- fifo for auto-answering of + -- the master path, if set to 0 + -- no buffer is used at all + SECURE_MODE : integer range 0 to 1 := SECURE_MODE + --if secure_mode is not used, apl must provide error pattern and dtype until + --next trigger comes in. In secure mode these must be available when hold_trm goes low + ); + port( + -- Misc + CLK : in std_logic; + RESET : in std_logic; + CLK_EN : in std_logic; + INT_DATAREADY_OUT: out std_logic; + INT_DATA_OUT: out std_logic_vector (15 downto 0); -- Data word + INT_PACKET_NUM_OUT: out std_logic_vector (1 downto 0); + INT_READ_IN: in std_logic; + INT_DATAREADY_IN: in std_logic; + INT_DATA_IN: in std_logic_vector (15 downto 0); -- Data word + INT_PACKET_NUM_IN: in std_logic_vector (1 downto 0); + INT_READ_OUT: out std_logic; + -- "mini" APL, just to see the triggers coming in + APL_DTYPE_OUT: out std_logic_vector (3 downto 0); -- see NewTriggerBusNetworkDescr + APL_ERROR_PATTERN_OUT: out std_logic_vector (31 downto 0); -- see NewTriggerBusNetworkDescr + APL_SEQNR_OUT: out std_logic_vector (7 downto 0); + APL_GOT_TRM: out std_logic; + APL_HOLD_TRM: in std_logic; + APL_DTYPE_IN: in std_logic_vector (3 downto 0); -- see NewTriggerBusNetworkDescr + APL_ERROR_PATTERN_IN: in std_logic_vector (31 downto 0); -- see NewTriggerBusNetworkDescr + APL_MY_ADDRESS_IN: in std_logic_vector (15 downto 0) -- My own address (temporary solution!!!) + -- Status and control port + ); + end component; + + + signal apl_to_buf_INIT_DATAREADY: std_logic; + signal apl_to_buf_INIT_DATA : std_logic_vector (15 downto 0); + signal apl_to_buf_INIT_PACKET_NUM:std_logic_vector (1 downto 0); + signal apl_to_buf_INIT_READ : std_logic; + + signal buf_to_apl_INIT_DATAREADY: std_logic; + signal buf_to_apl_INIT_DATA : std_logic_vector (15 downto 0); + signal buf_to_apl_INIT_PACKET_NUM:std_logic_vector (1 downto 0); + signal buf_to_apl_INIT_READ : std_logic; + + signal apl_to_buf_REPLY_DATAREADY: std_logic; + signal apl_to_buf_REPLY_DATA : std_logic_vector (15 downto 0); + signal apl_to_buf_REPLY_PACKET_NUM:std_logic_vector (1 downto 0); + signal apl_to_buf_REPLY_READ : std_logic; + + signal buf_to_apl_REPLY_DATAREADY: std_logic; + signal buf_to_apl_REPLY_DATA : std_logic_vector (15 downto 0); + signal buf_to_apl_REPLY_PACKET_NUM:std_logic_vector (1 downto 0); + signal buf_to_apl_REPLY_READ : std_logic; + + -- for the connection to the multiplexer + signal MED_INIT_DATAREADY_OUT : std_logic; + signal MED_INIT_DATA_OUT : std_logic_vector (15 downto 0); + signal MED_INIT_PACKET_NUM_OUT : std_logic_vector (1 downto 0); + signal MED_INIT_READ_IN : std_logic; + + signal MED_INIT_DATAREADY_IN : std_logic; + signal MED_INIT_DATA_IN : std_logic_vector (15 downto 0); + signal MED_INIT_PACKET_NUM_IN : std_logic_vector (1 downto 0); + signal MED_INIT_READ_OUT : std_logic; + + signal MED_REPLY_DATAREADY_OUT : std_logic; + signal MED_REPLY_DATA_OUT : std_logic_vector (15 downto 0); + signal MED_REPLY_PACKET_NUM_OUT : std_logic_vector (1 downto 0); + signal MED_REPLY_READ_IN : std_logic; + + signal MED_REPLY_DATAREADY_IN : std_logic; + signal MED_REPLY_DATA_IN : std_logic_vector (15 downto 0); + signal MED_REPLY_PACKET_NUM_IN : std_logic_vector (1 downto 0); + signal MED_REPLY_READ_OUT : std_logic; + + signal m_DATAREADY_OUT : std_logic_vector (1 downto 0); + signal m_DATA_OUT : std_logic_vector (2**MULT_WIDTH*BUS_WIDTH-1 downto 0); + signal m_PACKET_NUM_OUT: std_logic_vector (2**MULT_WIDTH*NUM_WIDTH-1 downto 0); + signal m_READ_IN : std_logic_vector (1 downto 0); + + signal m_DATAREADY_IN : std_logic_vector (1 downto 0); + signal m_DATA_IN : std_logic_vector (2**MULT_WIDTH*BUS_WIDTH-1 downto 0); + signal m_PACKET_NUM_IN : std_logic_vector (2**MULT_WIDTH*NUM_WIDTH-1 downto 0); + signal m_READ_OUT : std_logic_vector (1 downto 0); + +begin +------------------------------------------------- +--Connection between multiplexer and iobuf +------------------------------------------------- + m_DATAREADY_OUT(0) <= MED_INIT_DATAREADY_OUT; + m_DATAREADY_OUT(1) <= MED_REPLY_DATAREADY_OUT; + m_DATA_OUT(15 downto 0) <= MED_INIT_DATA_OUT; + m_DATA_OUT(31 downto 16) <= MED_REPLY_DATA_OUT; + m_PACKET_NUM_OUT(1 downto 0) <= MED_INIT_PACKET_NUM_OUT; + m_PACKET_NUM_OUT(3 downto 2) <= MED_REPLY_PACKET_NUM_OUT; + MED_INIT_READ_IN <= m_READ_IN(0); + MED_REPLY_READ_IN <= m_READ_IN(1); + + MED_INIT_DATAREADY_IN <= m_DATAREADY_IN(0); + MED_REPLY_DATAREADY_IN <= m_DATAREADY_IN(1); + MED_INIT_DATA_IN <= m_DATA_IN(15 downto 0); + MED_REPLY_DATA_IN <= m_DATA_IN(31 downto 16); + MED_INIT_PACKET_NUM_IN <= m_PACKET_NUM_IN(1 downto 0); + MED_REPLY_PACKET_NUM_IN <= m_PACKET_NUM_IN(3 downto 2); + m_READ_OUT(0) <= MED_INIT_READ_OUT; + m_READ_OUT(1) <= MED_REPLY_READ_OUT; + +IOBUF: trb_net16_iobuf + port map ( + -- Misc + CLK => CLK , + RESET => RESET, + CLK_EN => CLK_EN, + -- Media direction port + MED_INIT_DATAREADY_OUT => MED_INIT_DATAREADY_OUT, + MED_INIT_DATA_OUT => MED_INIT_DATA_OUT, + MED_INIT_PACKET_NUM_OUT => MED_INIT_PACKET_NUM_OUT, + MED_INIT_READ_IN => MED_INIT_READ_IN, + MED_INIT_DATAREADY_IN => MED_INIT_DATAREADY_IN, + MED_INIT_DATA_IN => MED_INIT_DATA_IN, + MED_INIT_PACKET_NUM_IN => MED_INIT_PACKET_NUM_IN, + MED_INIT_READ_OUT => MED_INIT_READ_OUT, + MED_INIT_ERROR_IN => (others => '0'), + MED_REPLY_DATAREADY_OUT => MED_REPLY_DATAREADY_OUT, + MED_REPLY_DATA_OUT => MED_REPLY_DATA_OUT, + MED_REPLY_PACKET_NUM_OUT=> MED_REPLY_PACKET_NUM_OUT, + MED_REPLY_READ_IN => MED_REPLY_READ_IN, + MED_REPLY_DATAREADY_IN => MED_REPLY_DATAREADY_IN, + MED_REPLY_DATA_IN => MED_REPLY_DATA_IN, + MED_REPLY_PACKET_NUM_IN => MED_REPLY_PACKET_NUM_IN, + MED_REPLY_READ_OUT => MED_REPLY_READ_OUT, + MED_REPLY_ERROR_IN => (others => '0'), + -- Internal direction port + INT_INIT_DATAREADY_OUT => buf_to_apl_INIT_DATAREADY, + INT_INIT_DATA_OUT => buf_to_apl_INIT_DATA, + INT_INIT_PACKET_NUM_OUT=> buf_to_apl_INIT_PACKET_NUM, + INT_INIT_READ_IN => buf_to_apl_INIT_READ, + INT_INIT_DATAREADY_IN => apl_to_buf_INIT_DATAREADY, + INT_INIT_DATA_IN => apl_to_buf_INIT_DATA, + INT_INIT_PACKET_NUM_IN => apl_to_buf_INIT_PACKET_NUM, + INT_INIT_READ_OUT => apl_to_buf_INIT_READ, + INT_REPLY_HEADER_IN => '0', + INT_REPLY_DATAREADY_OUT => buf_to_apl_REPLY_DATAREADY, + INT_REPLY_DATA_OUT => buf_to_apl_REPLY_DATA, + INT_REPLY_PACKET_NUM_OUT=> buf_to_apl_REPLY_PACKET_NUM, + INT_REPLY_READ_IN => buf_to_apl_REPLY_READ, + INT_REPLY_DATAREADY_IN => apl_to_buf_REPLY_DATAREADY, + INT_REPLY_DATA_IN => apl_to_buf_REPLY_DATA, + INT_REPLY_PACKET_NUM_IN => apl_to_buf_REPLY_PACKET_NUM, + INT_REPLY_READ_OUT => apl_to_buf_REPLY_READ, + -- Status and control port + STAT_GEN => STAT_GEN, + STAT_LOCKED => STAT_LOCKED, + STAT_INIT_BUFFER => STAT_INIT_BUFFER, + STAT_REPLY_BUFFER => STAT_REPLY_BUFFER, + CTRL_GEN => CTRL_GEN, + CTRL_LOCKED => CTRL_LOCKED, + STAT_CTRL_INIT_BUFFER => STAT_CTRL_INIT_BUFFER, + STAT_CTRL_REPLY_BUFFER => STAT_CTRL_REPLY_BUFFER + ); + + MPLEX: trb_net16_io_multiplexer + port map ( + CLK => CLK, + RESET => RESET , + CLK_EN => CLK_EN, + MED_DATAREADY_IN => MED_DATAREADY_IN, + MED_DATA_IN => MED_DATA_IN, + MED_PACKET_NUM_IN => MED_PACKET_NUM_IN, + MED_READ_OUT => MED_READ_OUT, + MED_DATAREADY_OUT => MED_DATAREADY_OUT, + MED_DATA_OUT => MED_DATA_OUT, + MED_PACKET_NUM_OUT => MED_PACKET_NUM_OUT, + MED_READ_IN => MED_READ_IN, + INT_DATAREADY_OUT => m_DATAREADY_IN, + INT_DATA_OUT =>m_DATA_IN, + INT_PACKET_NUM_OUT => m_PACKET_NUM_IN, + INT_READ_IN =>m_READ_OUT, + INT_DATAREADY_IN =>m_DATAREADY_OUT, + INT_DATA_IN =>m_DATA_OUT, + INT_PACKET_NUM_IN => m_PACKET_NUM_OUT, + INT_READ_OUT =>m_READ_IN, + CTRL => MPLEX_CTRL + ); + + + TRM_INIT : trb_net16_term + port map( + -- Misc + CLK => CLK, + RESET => RESET, + CLK_EN => CLK_EN, + INT_DATAREADY_OUT => apl_to_buf_REPLY_DATAREADY, + INT_DATA_OUT => apl_to_buf_REPLY_DATA, + INT_PACKET_NUM_OUT => apl_to_buf_REPLY_PACKET_NUM, + INT_READ_IN => apl_to_buf_REPLY_READ, + INT_DATAREADY_IN => buf_to_apl_INIT_DATAREADY, + INT_DATA_IN => buf_to_apl_INIT_DATA, + INT_PACKET_NUM_IN => buf_to_apl_INIT_PACKET_NUM, + INT_READ_OUT => buf_to_apl_INIT_READ, + -- "mini" APL, just to see the triggers coming in + APL_DTYPE_OUT => APL_DTYPE_OUT, + APL_ERROR_PATTERN_OUT => APL_ERROR_PATTERN_OUT, + APL_SEQNR_OUT => APL_SEQNR_OUT, + APL_GOT_TRM => APL_GOT_TRIGGER_OUT, + APL_HOLD_TRM => APL_HOLD_IN, + APL_DTYPE_IN => "0000", + APL_ERROR_PATTERN_IN => APL_ERROR_PATTERN_IN, + APL_MY_ADDRESS_IN => APL_MY_ADDRESS_IN + -- Status and control port + ); + + + + +end architecture; \ No newline at end of file diff --git a/trb_net_fifo.vhd b/trb_net_fifo.vhd index a7b2c4f..bda4d5f 100644 --- a/trb_net_fifo.vhd +++ b/trb_net_fifo.vhd @@ -12,7 +12,7 @@ USE ieee.std_logic_arith.ALL; entity trb_net_fifo is - generic (WIDTH : integer := 16; -- FIFO word width + generic (WIDTH : integer := 18; -- FIFO word width DEPTH : integer := 3); -- Depth of the FIFO, 2^(n+1) port (CLK : in std_logic; diff --git a/trb_net_sbuf.vhd b/trb_net_sbuf.vhd index 9e24680..0655a4f 100644 --- a/trb_net_sbuf.vhd +++ b/trb_net_sbuf.vhd @@ -21,9 +21,9 @@ use work.trb_net_std.all; entity trb_net_sbuf is - generic (DATA_WIDTH : integer := 56; - VERSION: integer := 1); --- generic (DATA_WIDTH : integer := 1); + generic (DATA_WIDTH : integer := 18; + VERSION: integer := 0); + port( -- Misc @@ -124,7 +124,6 @@ begin if combined_COMB_DATAREADY_IN = '1' and SYN_READ_IN = '1' then -- COMB logic is writing into the sbuf -- at the same time syn port is reading - next_buffer_state <= BUFFER_B2_FULL; if VERSION = 1 then next_next_READ_OUT <= '0'; end if; @@ -142,40 +141,30 @@ begin next_buffer_state <= BUFFER_EMPTY; next_SYN_DATAREADY_OUT <= '0'; else - next_buffer_state <= BUFFER_B2_FULL; next_next_READ_OUT <= '0'; next_SYN_DATAREADY_OUT <= '1'; end if; elsif current_buffer_state = BUFFER_B1_FULL then current_buffer_state_int <= "10"; + next_SYN_DATAREADY_OUT <= '1'; + next_next_READ_OUT <= '0'; + if combined_COMB_DATAREADY_IN = '1' and SYN_READ_IN = '1' then -- COMB logic is writing into the sbuf -- at the same time syn port is reading - next_buffer_state <= BUFFER_B1_FULL; - next_next_READ_OUT <= '0'; use_current_b1_buffer <= '1'; move_b1_buffer <= '1'; move_b2_buffer <= '1'; - next_SYN_DATAREADY_OUT <= '1'; elsif combined_COMB_DATAREADY_IN = '1' then -- ONLY COMB logic is writing into the sbuf -- FATAL ERROR next_got_overflow <= '1'; - next_buffer_state <= BUFFER_B1_FULL; - next_next_READ_OUT <= '0'; --PLEASE stop writing - next_SYN_DATAREADY_OUT <= '1'; elsif SYN_READ_IN = '1' then next_buffer_state <= BUFFER_B2_FULL; use_current_b1_buffer <= '1'; move_b1_buffer <= '1'; move_b2_buffer <= '1'; - next_next_READ_OUT <= '0'; - next_SYN_DATAREADY_OUT <= '1'; - else - next_buffer_state <= BUFFER_B1_FULL; - next_next_READ_OUT <= '0'; - next_SYN_DATAREADY_OUT <= '1'; - end if; + end if; end if; -- for version1 it is more complicated: we have to gate @@ -226,11 +215,6 @@ begin current_got_overflow <= next_got_overflow; current_SYN_DATAREADY_OUT <= next_SYN_DATAREADY_OUT; current_next_READ_OUT <= next_next_READ_OUT; - else - current_buffer_state <= current_buffer_state; - current_got_overflow <= current_got_overflow; - current_SYN_DATAREADY_OUT <= current_SYN_DATAREADY_OUT; - current_next_READ_OUT <= current_next_READ_OUT; end if; end if; end process; @@ -243,8 +227,6 @@ begin current_b1_buffer <= (others => '0'); elsif move_b1_buffer = '1' then current_b1_buffer <= next_b1_buffer; - else - current_b1_buffer <= current_b1_buffer; end if; end if; end process; @@ -258,8 +240,6 @@ begin current_b2_buffer <= (others => '0'); elsif move_b2_buffer = '1' then current_b2_buffer <= next_b2_buffer; - else - current_b2_buffer <= current_b2_buffer; end if; end if; end process;