From: hadeshyp <hadeshyp>
Date: Tue, 7 Aug 2012 16:39:33 +0000 (+0000)
Subject: *** empty log message ***
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=80b739876735e8348a89a667214e6bb66899e833;p=daqdocu.git

*** empty log message ***
---

diff --git a/daqnet.kilepr b/daqnet.kilepr
index e3c6764..cdf552a 100755
--- a/daqnet.kilepr
+++ b/daqnet.kilepr
@@ -332,12 +332,12 @@ order=15
 
 [item:cts.tex]
 archive=true
-column=118
+column=0
 encoding=UTF-8
 highlight=LaTeX
-line=45
+line=322
 mode=LaTeX
-open=true
+open=false
 order=20
 
 [item:daqcontrol.tex]
@@ -585,9 +585,9 @@ archive=true
 column=0
 encoding=UTF-8
 highlight=LaTeX
-line=29
+line=0
 mode=LaTeX
-open=true
+open=false
 order=21
 
 [item:showerdata.tex]
@@ -647,8 +647,8 @@ CursorColumn=0
 CursorLine=0
 
 [view-settings,view=0,item:cts.tex]
-CursorColumn=118
-CursorLine=45
+CursorColumn=0
+CursorLine=322
 
 [view-settings,view=0,item:daqcontrol.tex]
 CursorColumn=0
diff --git a/trb3/CodeRepository.tex b/trb3/CodeRepository.tex
index e69de29..3000d62 100644
--- a/trb3/CodeRepository.tex
+++ b/trb3/CodeRepository.tex
@@ -0,0 +1,7 @@
+\begin{description*}
+ \item[Trb3 Vhdl]cvs -d lxi051.gsi.de:/misc/hadesprojects/daq/cvsroot/trb3 
+ \item[TrbNet Vhdl]cvs -d lxi051.gsi.de:/misc/hadesprojects/daq/cvsroot/trbnet
+ \item[Trb3 Documentation]cvs -d lxi051.gsi.de:/misc/hadesprojects/daq/cvsroot/daq\_docu/trb3
+ \item[Trb3 Software]cvs -d lxi051.gsi.de:/misc/hadesprojects/daq/cvsroot/trbsoft/trb3
+ \item[Dabc Eventbuilder]http://hades-wiki.gsi.de/cgi-bin/view/DaqSlowControl/EventBuilderDabc
+\end{description*}
diff --git a/trb3/CtsAddOn.tex b/trb3/CtsAddOn.tex
new file mode 100644
index 0000000..fc1a65a
--- /dev/null
+++ b/trb3/CtsAddOn.tex
@@ -0,0 +1 @@
+An AddOn for the central FPGA featuring some CTS I/O connections. Not yet designed.
\ No newline at end of file
diff --git a/trb3/Trb3Hardware.tex b/trb3/Trb3Hardware.tex
index b665859..e69de29 100644
--- a/trb3/Trb3Hardware.tex
+++ b/trb3/Trb3Hardware.tex
@@ -1,8 +0,0 @@
-\vspace*{\fill}
-\begin{figure}[htp]
-  \centering
-  \includegraphics[width=\textwidth]{figures/trb3_28_09_11.jpg}
-  \caption{TRBv3 Board.}
-  \label{fig:trb3}
-\end{figure}
-\vspace*{\fill}
\ No newline at end of file
diff --git a/trb3/WasaFrontend.tex b/trb3/WasaFrontend.tex
new file mode 100644
index 0000000..e0c6f9a
--- /dev/null
+++ b/trb3/WasaFrontend.tex
@@ -0,0 +1,49 @@
+Not an AddOn, but a front-end to be used in combination with TDC in the TRB3. A special AddOn is used on the TRB3 to connect four front-ends to one FPGA.
+
+\subsubsection{Building Blocks}
+The device contains:
+\begin{itemize*}
+ \item 16 channel LVDS input/output using discriminators only
+ \item SPI Interface for configuration / monitoring
+ \item PWM generation with 16 channels and 16 bit for each of the input comparators
+ \item 1-wire interface for temperature sensor and unique ID
+ \item on-chip Flash to store configuration data
+\end{itemize*}
+
+
+\subsubsection{Configuration}
+All configuration is done via a single-device SPI bus. The interface is kept similar to the LTC2600 to use the same SPI master code.
+
+\begin{table}
+ \begin{tabularx}{\textwidth}{c|c|X}
+\textbf{Bits} & \textbf{Name} & \textbf{Content} \\
+\hline
+31 -- 24 & Select & See table \ref{tab:spiselect}\\
+23 -- 20 & Command & Command, similar to LTC2600:\newline
+0: write\newline
+8: read\newline
+other: no operation \\
+19 -- 16 & Channel & Channel / Register select (0 -- 15)\\
+15 -- 0\newline (\& following$\dagger$)& Data & 16 Bit data payload for write commands\\
+
+ \end{tabularx} 
+\caption{SPI first data word structure. Following 32 bit words contain payload only}
+\label{tab:spidata}
+\end{table} 
+
+
+\begin{table}
+ \begin{tabularx}{\textwidth}{c|c|X}
+\textbf{Value} & \textbf{Name} & \textbf{Description} \\
+\hline
+0x00 & PWM & Write/read settings for PWM channels 0 - 15.\\
+0x10 & UId / Temperature & read unique id. 64 Bit Id is divided in 4 16 Bit words, in registers 0 - 3. Temperature is available in register 4. (r/o)\\
+0x20 & I/O $\dagger$& Register 0 contains one bit per input. 0: enable (default), 1: disable.\newline Register 1 shows the current status of the pin.\newline Register 2 Write: Override LED status. Bit 0-3: LED in alphabetical order. Bit 4: enable override. Read: LED status. \\
+0x40 & Memory & Read/Write to/from RAM. 16 registers with 16 Bit each. (Payload is written to/sent from subsequent registers $\dagger$)\\
+0x50 & Flash $\dagger$& Write RAM content to Flash. No data payload\\
+0x51 & Flash $\dagger$& Load RAM content from Flash. No data payload\\
+0x52 & Flash $\dagger$& Load RAM content as PWM settings. No data payload\\
+ \end{tabularx} 
+\caption{SPI component selection}
+\label{tab:spiselect}
+\end{table} 
\ No newline at end of file
diff --git a/trb3/main.tex b/trb3/main.tex
index 3d81ccf..06509ee 100755
--- a/trb3/main.tex
+++ b/trb3/main.tex
@@ -104,6 +104,15 @@
 \newcounter{ct}
 
 \maketitle
+
+\vspace*{\fill}
+\begin{figure}[htp]
+  \centering
+  \includegraphics[width=\textwidth]{figures/trb3_28_09_11.jpg}
+  \caption{TRBv3 Board.}
+  \label{fig:trb3}
+\end{figure}
+\vspace*{\fill}
 \clearpage
 \tableofcontents
 
@@ -115,7 +124,6 @@
 \cleardoublepage
 \part{Hardware}
   \input{Trb3Hardware}
-  \clearpage
   \section{Measurements}
     \subsection{FPGA I/O Performance}
     \clearpage
@@ -137,6 +145,10 @@
       \input{SfpAddOn}
     \subsection{MVD AddOn}
       \input{MvdAddOn}
+    \subsection{CTS AddOn}
+      \input{CtsAddOn}
+    \subsection{Panda Dirc Wasa Front-end}
+      \input{WasaFrontend}
   \cleardoublepage
 
 \part{Design Components}
diff --git a/trb3/trb3.kilepr b/trb3/trb3.kilepr
index 447e720..6c009c4 100644
--- a/trb3/trb3.kilepr
+++ b/trb3/trb3.kilepr
@@ -4,7 +4,7 @@ img_extIsRegExp=false
 img_extensions=.eps .jpg .jpeg .png .pdf .ps .fig .gif
 kileprversion=2
 kileversion=2.1.2
-lastDocument=TdcSlowControl.tex
+lastDocument=Trb3GeneralRemarks.tex
 masterDocument=
 name=trb3
 pkg_extIsRegExp=false
@@ -228,10 +228,10 @@ order=4
 
 [item:Trb3GeneralRemarks.tex]
 archive=true
-column=0
+column=37
 encoding=UTF-8
 highlight=LaTeX
-line=30
+line=73
 mode=LaTeX
 open=true
 order=10
@@ -248,10 +248,10 @@ order=3
 
 [item:main.tex]
 archive=true
-column=22
+column=21
 encoding=UTF-8
 highlight=LaTeX
-line=122
+line=66
 mode=LaTeX
 open=true
 order=0
@@ -321,8 +321,8 @@ JumpList=
 ViMarks=
 
 [view-settings,view=0,item:Trb3GeneralRemarks.tex]
-CursorColumn=0
-CursorLine=30
+CursorColumn=37
+CursorLine=73
 JumpList=
 ViMarks=
 
@@ -333,7 +333,7 @@ JumpList=
 ViMarks=
 
 [view-settings,view=0,item:main.tex]
-CursorColumn=22
-CursorLine=122
+CursorColumn=21
+CursorLine=66
 JumpList=
 ViMarks=