From: hadeshyp Date: Tue, 8 May 2012 20:16:02 +0000 (+0000) Subject: *** empty log message *** X-Git-Tag: oldGBE~70 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=83a408ea358dc3114d5004a3fdd017f018cd596e;p=trbnet.git *** empty log message *** --- diff --git a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ipx b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ipx index 74309ad..cada8be 100644 --- a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ipx +++ b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ipx @@ -1,10 +1,10 @@ - + - - - - - + + + + + diff --git a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.lpc b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.lpc index 85bcceb..78e9a7a 100644 --- a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.lpc +++ b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.lpc @@ -1,9 +1,9 @@ [Device] -Family=ep5m00 -PartType=LFE2M100E -PartName=LFE2M100E-5F900C -SpeedGrade=5 -Package=FPBGA900 +Family=ep5c00 +PartType=LFE3-150EA +PartName=LFE3-150EA-8FN1156C +SpeedGrade=8 +Package=FPBGA1156 OperatingCondition=COM Status=P @@ -16,8 +16,8 @@ CoreRevision=3.4 ModuleName=sgmii_gbe_pcs34 SourceFormat=VHDL ParameterFileVersion=1.0 -Date=06/17/2011 -Time=11:36:40 +Date=10/04/2011 +Time=13:50:08 [Parameters] RX_CTC=2 diff --git a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ngo b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ngo index 0038491..0b24d25 100644 Binary files a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ngo and b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ngo differ diff --git a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_bb.v b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_bb.v index 059cdad..5b49cc1 100644 --- a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_bb.v +++ b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_bb.v @@ -1,5 +1,5 @@ //============================================================================= -// Verilog module generated by IPExpress 06/17/2011 11:36:53 +// Verilog module generated by IPExpress 10/04/2011 13:50:20 // Filename: sgmii_gbe_pcs34_bb.v // Copyright(c) 2008 Lattice Semiconductor Corporation. All rights reserved. //============================================================================= diff --git a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_beh.v b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_beh.v index 6a960da..e3a0f02 100644 --- a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_beh.v +++ b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_beh.v @@ -10,7 +10,7 @@ `define SGMII_YES_CTC_DYNAMIC -`define SGMII_FIFO_FAMILY_ECP2M +`define SGMII_FIFO_FAMILY_ECP3 `define SGMII_YES_SINGLE_CLOCK diff --git a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_filelist.log b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_filelist.log index 842767f..88e4e39 100644 --- a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_filelist.log +++ b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_filelist.log @@ -1,12 +1,12 @@ ============================================================================= -Filelist generated by IPexpress 06/17/2011 11:36:53 +Filelist generated by IPexpress 10/04/2011 13:50:21 Filename: sgmii_gbe_pcs34_filelist.log Copyright(c) 2008 Lattice Semiconductor Corporation. All rights reserved. ============================================================================= ----------------------------------------------------------------------------- Basic IP Core Files -Output Directory: /home/greg/projects/trbnet/gbe2_ecp2m/ipcores/sgmii_gbe_pcs34 +Output Directory: /home/greg/projects/trb3/trb3_gbe/ipcores ----------------------------------------------------------------------------- sgmii_gbe_pcs34.lpc : IP ispLEVER LPC File @@ -32,7 +32,7 @@ Supplemental Evaluation Files: ---------------------------------: Hardware Specific Models - ../sgmii_pcs_eval/models/ecp2m/pcs_serdes + ../sgmii_pcs_eval/models/ecp3/pcs_serdes Testbench ../sgmii_pcs_eval/testbench @@ -42,7 +42,7 @@ Supplemental Evaluation Files: ------------------------------------------------ Source Files - ../sgmii_pcs_eval/sgmii_gbe_pcs34/src/rtl/ecp2m + ../sgmii_pcs_eval/sgmii_gbe_pcs34/src/rtl/ecp3 Simulation ../sgmii_pcs_eval/sgmii_gbe_pcs34/sim/modelsim diff --git a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_generate.log b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_generate.log index e6740a3..15d4967 100644 --- a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_generate.log +++ b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_generate.log @@ -1,30 +1,30 @@ Starting process: IPCFG GenerateCore within package Core_Generate 1.0.0 in file LatticeIP_generate.tcl -Starting process: '"/opt/lattice/diamond/1.1/bin/lin/synpwrap" -rem -e sgmii_gbe_pcs34 -target lattice-ecp2m' +Starting process: '"/opt/lattice/diamond/1.3/bin/lin/synpwrap" -rem -e sgmii_gbe_pcs34 -target lattice-ecp3' Warning: You are running on an unsupported platform End process: completed successfully. -Starting process: '"/opt/lattice/diamond/1.1/bin/lin/../../ispfpga/bin/lin/edif2ngd" -ip "/home/greg/sgmii_gbepcs_v3.4/lib/../.." -ic sgmii_gbepcs_v3.4 -l LatticeECP2M-DSP -nopropwarn "syn_results/sgmii_gbe_pcs34.edi" "sgmii_gbe_pcs34.ngo"' -edif2ngd: version Diamond_1.1_Production (517) +Starting process: '"/opt/lattice/diamond/1.3/bin/lin/../../ispfpga/bin/lin/edif2ngd" -ip "/home/greg/sgmii_gbepcs_v3.4/lib/../.." -ic sgmii_gbepcs_v3.4 -l LatticeECP3 -nopropwarn "syn_results/sgmii_gbe_pcs34.edi" "sgmii_gbe_pcs34.ngo"' +edif2ngd: version Diamond_1.3_Production (92) Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. - Copyright (c) 2002-2010 Lattice Semiconductor Corporation, All rights reserved. + Copyright (c) 2002-2011 Lattice Semiconductor Corporation, All rights reserved. No device specified. Will use default. Writing the design to sgmii_gbe_pcs34.ngo... End process: completed successfully. ============================================================================= -Filelist generated by IPexpress 06/17/2011 11:36:53 +Filelist generated by IPexpress 10/04/2011 13:50:21 Filename: sgmii_gbe_pcs34_filelist.log Copyright(c) 2008 Lattice Semiconductor Corporation. All rights reserved. ============================================================================= ----------------------------------------------------------------------------- Basic IP Core Files -Output Directory: /home/greg/projects/trbnet/gbe2_ecp2m/ipcores/sgmii_gbe_pcs34 +Output Directory: /home/greg/projects/trb3/trb3_gbe/ipcores ----------------------------------------------------------------------------- sgmii_gbe_pcs34.lpc : IP ispLEVER LPC File @@ -49,7 +49,7 @@ Supplemental Evaluation Files: ---------------------------------: Hardware Specific Models - ../sgmii_pcs_eval/models/ecp2m/pcs_serdes + ../sgmii_pcs_eval/models/ecp3/pcs_serdes Testbench ../sgmii_pcs_eval/testbench @@ -59,7 +59,7 @@ Supplemental Evaluation Files: ------------------------------------------------ Source Files - ../sgmii_pcs_eval/sgmii_gbe_pcs34/src/rtl/ecp2m + ../sgmii_pcs_eval/sgmii_gbe_pcs34/src/rtl/ecp3 Simulation ../sgmii_pcs_eval/sgmii_gbe_pcs34/sim/modelsim diff --git a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_inst.v b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_inst.v index 7cc495e..09b7954 100644 --- a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_inst.v +++ b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_inst.v @@ -1,5 +1,5 @@ //============================================================================= -// Verilog module generated by IPExpress 06/17/2011 11:36:53 +// Verilog module generated by IPExpress 10/04/2011 13:50:20 // Filename: sgmii_gbe_pcs34_inst.v // Copyright(c) 2008 Lattice Semiconductor Corporation. All rights reserved. //=============================================================================