From: Andreas Neiser Date: Wed, 18 Feb 2015 18:39:51 +0000 (+0100) Subject: Correct shift register X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=8934f614f9272f6de67dc80ab0369affdcc07c40;p=trb3.git Correct shift register --- diff --git a/ADC/source/adc_processor_cfd_ch.vhd b/ADC/source/adc_processor_cfd_ch.vhd index c1e4a15..6572e12 100644 --- a/ADC/source/adc_processor_cfd_ch.vhd +++ b/ADC/source/adc_processor_cfd_ch.vhd @@ -106,7 +106,7 @@ begin proc_baseline_delay : process is begin wait until rising_edge(CLK); - delay_baseline <= delay_baseline(delay_baseline'high downto 1) & delay_baseline_in; + delay_baseline <= delay_baseline(delay_baseline'high-1 downto 0) & delay_baseline_in; delay_baseline_out <= delay_baseline(delay_baseline'high); end process proc_baseline_delay;