From: Thomas Gessler Date: Thu, 25 Feb 2021 09:48:21 +0000 (+0100) Subject: Merge commit '8dd99c8843ba968c8b98a1de0dd3377a94603a9e' as 'hub_test/src/tx_phase_ali... X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=8b4eaa0aff86d7acc39b14bf32d0a2c0532c65a7;p=cri.git Merge commit '8dd99c8843ba968c8b98a1de0dd3377a94603a9e' as 'hub_test/src/tx_phase_aligner' Add TX phase aligner core from CERN HPTD project: https://gitlab.cern.ch/HPTD/tx_phase_aligner This achieves TX phase alignment to a reference clock by the method described in: E. Mendes, S. Baron, C. Soos, J. Troska and P. Novellini, "Achieving Picosecond-Level Phase Stability in Timing Distribution Systems With Xilinx Ultrascale Transceivers," in IEEE Transactions on Nuclear Science, vol. 67, no. 3, pp. 473-481, March 2020, doi: 10.1109/TNS.2020.2968112. --- 8b4eaa0aff86d7acc39b14bf32d0a2c0532c65a7 diff --cc hub_test/src/tx_phase_aligner/.gitkeep index 0000000,e69de29..e69de29 mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/.gitkeep +++ b/hub_test/src/tx_phase_aligner/.gitkeep diff --cc hub_test/src/tx_phase_aligner/README.md index 0000000,132498e..132498e mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/README.md +++ b/hub_test/src/tx_phase_aligner/README.md diff --cc hub_test/src/tx_phase_aligner/license.txt index 0000000,e72bfdd..e72bfdd mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/license.txt +++ b/hub_test/src/tx_phase_aligner/license.txt diff --cc hub_test/src/tx_phase_aligner/run_script_tcl.bat index 0000000,3091023..3091023 mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/run_script_tcl.bat +++ b/hub_test/src/tx_phase_aligner/run_script_tcl.bat diff --cc hub_test/src/tx_phase_aligner/scripts/sim/tx_phase_aligner_simu.tcl index 0000000,b9ab671..b9ab671 mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/scripts/sim/tx_phase_aligner_simu.tcl +++ b/hub_test/src/tx_phase_aligner/scripts/sim/tx_phase_aligner_simu.tcl diff --cc hub_test/src/tx_phase_aligner/scripts/sim/tx_phase_aligner_simu.wcfg index 0000000,807a3ea..807a3ea mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/scripts/sim/tx_phase_aligner_simu.wcfg +++ b/hub_test/src/tx_phase_aligner/scripts/sim/tx_phase_aligner_simu.wcfg diff --cc hub_test/src/tx_phase_aligner/source/constrs/imports/example_design/gtwizard_ultrascale_0_example_top.xdc index 0000000,49022dc..49022dc mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/source/constrs/imports/example_design/gtwizard_ultrascale_0_example_top.xdc +++ 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--- a/hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_init.v +++ b/hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_init.v diff --cc hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_reset_synchronizer.v index 0000000,4ecfcbf..4ecfcbf mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_reset_synchronizer.v +++ b/hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_reset_synchronizer.v diff --cc hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_stimulus_raw.v index 0000000,dadd8bb..dadd8bb mode 000000,100644..100644 --- a/hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_stimulus_raw.v +++ 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