From: hadeshyp Date: Thu, 14 Feb 2013 18:34:02 +0000 (+0000) Subject: *** empty log message *** X-Git-Tag: oldGBE~13 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=8daf491444227b8ffb64189f3cb0fcc97ef2171f;p=trbnet.git *** empty log message *** --- diff --git a/gbe2_ecp3/trb_net16_gbe_main_control.vhd b/gbe2_ecp3/trb_net16_gbe_main_control.vhd index 1fbeea9..87f2e18 100644 --- a/gbe2_ecp3/trb_net16_gbe_main_control.vhd +++ b/gbe2_ecp3/trb_net16_gbe_main_control.vhd @@ -324,7 +324,8 @@ begin end if; -- gk 16.11.11 when CHECK_TYPE => - if (link_current_state = ACTIVE) then + redirect_state <= x"1"; + if (link_current_state = ACTIVE) then redirect_next_state <= CHECK_BUSY; elsif (link_current_state = GET_ADDRESS and RC_FRAME_PROTO_IN = "10") then redirect_next_state <= CHECK_BUSY; diff --git a/gbe2_ecp3/trb_net16_ipu2gbe.vhd b/gbe2_ecp3/trb_net16_ipu2gbe.vhd index 1337897..a5c5d89 100755 --- a/gbe2_ecp3/trb_net16_ipu2gbe.vhd +++ b/gbe2_ecp3/trb_net16_ipu2gbe.vhd @@ -802,13 +802,15 @@ begin rem_phase_comb <= '1'; end if; when WAIT_TO_REMOVE => - if (rem_ctr = x"a") then + state2 <= x"2"; + if (rem_ctr = x"a") then loadNextState <= DECIDE; else loadNextState <= WAIT_TO_REMOVE; end if; when DECIDE => - if (pc_sub_size >= MAX_MESSAGE_SIZE_IN) then + state2 <= x"2"; + if (pc_sub_size >= MAX_MESSAGE_SIZE_IN) then loadNextState <= PAUSE_BEFORE_DROP1; drop_large_comb <= '1'; elsif (pc_sub_size = b"0000_0000_0000_00") then -- gk 01.10.10 @@ -902,10 +904,12 @@ begin loadNextState <= WAIT_PC; end if; when PAUSE_BEFORE_DROP1 => - loadNextState <= PAUSE_BEFORE_DROP2; + state2 <= x"2"; + loadNextState <= PAUSE_BEFORE_DROP2; pc_sos_comb <= '1'; when PAUSE_BEFORE_DROP2 => - loadNextState <= DROP; + state2 <= x"2"; + loadNextState <= DROP; drop_event_comb <= '1'; -- gk 23.07.10 when DROP => @@ -919,7 +923,8 @@ begin end if; -- gk 25.07.10 when DROP_SUBSUB => - if (load_sub_done = '1') then + state2 <= x"e"; + if (load_sub_done = '1') then if( padding_needed = '0' ) then loadNextState <= CALCC; else diff --git a/media_interfaces/sync/med_sync_define.vhd b/media_interfaces/sync/med_sync_define.vhd index 4e17c4c..5f49b0f 100644 --- a/media_interfaces/sync/med_sync_define.vhd +++ b/media_interfaces/sync/med_sync_define.vhd @@ -146,7 +146,6 @@ component med_ecp3_sfp_sync is MED_PACKET_NUM_OUT : out std_logic_vector(2 downto 0) := (others => '0'); MED_DATAREADY_OUT : out std_logic := '0'; MED_READ_IN : in std_logic; - REFCLK2CORE_OUT : out std_logic := '0'; CLK_RX_HALF_OUT : out std_logic := '0'; CLK_RX_FULL_OUT : out std_logic := '0'; diff --git a/special/spi_slim.vhd b/special/spi_slim.vhd index 5a3dbfb..0d7d150 100755 --- a/special/spi_slim.vhd +++ b/special/spi_slim.vhd @@ -11,7 +11,7 @@ use work.trb_net_components.all; entity spi_slim is generic( - SLOW_SPI : integer range c_YES to c_NO := c_YES + SLOW_SPI : integer range c_NO to c_YES := c_YES ); port( SYSCLK : in std_logic; -- 100MHz sysclock diff --git a/trb_net16_addresses.vhd b/trb_net16_addresses.vhd index 755cbe4..348524e 100644 --- a/trb_net16_addresses.vhd +++ b/trb_net16_addresses.vhd @@ -39,9 +39,9 @@ end entity; architecture trb_net16_addresses_arch of trb_net16_addresses is -- Placer Directives - attribute HGROUP : string; +-- attribute HGROUP : string; -- for whole architecture - attribute HGROUP of trb_net16_addresses_arch : architecture is "RegIO_group"; +-- attribute HGROUP of trb_net16_addresses_arch : architecture is "RegIO_group"; component ram_16x16_dp is diff --git a/trb_net16_api_base.vhd b/trb_net16_api_base.vhd index 749efda..5275859 100644 --- a/trb_net16_api_base.vhd +++ b/trb_net16_api_base.vhd @@ -630,7 +630,7 @@ INT_MASTER_DATAREADY_OUT <= buf_INT_MASTER_DATAREADY_OUT; to_apl : process(fifo_to_apl_full, reg_INT_SLAVE_READ_OUT, INT_SLAVE_DATAREADY_IN, fifo_to_apl_empty, fifo_to_apl_long_packet_num_out, state_to_apl, reg_APL_TYP_OUT, reg_APL_PACKET_NUM_OUT, sbuf_to_apl_free, INT_SLAVE_DATA_IN, INT_SLAVE_PACKET_NUM_IN, APL_MY_ADDRESS_IN, APL_READ_IN, - reg_APL_DATAREADY_OUT, slave_running, fifo_to_apl_read_before, throw_away,state_to_int, + reg_APL_DATAREADY_OUT, slave_running, fifo_to_apl_read_before, state_to_int, saved_fifo_to_apl_packet_type,master_start, last_fifo_to_apl_read, sbuf_to_apl_next_READ, next_last_fifo_to_apl_read) begin diff --git a/trb_net16_hub_func.vhd b/trb_net16_hub_func.vhd index 06c0ad0..7548f12 100644 --- a/trb_net16_hub_func.vhd +++ b/trb_net16_hub_func.vhd @@ -380,219 +380,220 @@ component trb_net16_hub_streaming_port is ); end component; -component trb_net16_gbe_buf is -generic( - DO_SIMULATION : integer range 0 to 1 := 1; - USE_125MHZ_EXTCLK : integer range 0 to 1 := 1 -); -port( - CLK : in std_logic; - TEST_CLK : in std_logic; -- only for simulation! - CLK_125_TX_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode - CLK_125_RX_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode - RESET : in std_logic; - GSR_N : in std_logic; - -- Debug - STAGE_STAT_REGS_OUT : out std_logic_vector(31 downto 0); - STAGE_CTRL_REGS_IN : in std_logic_vector(31 downto 0); - -- configuration interface - IP_CFG_START_IN : in std_logic; - IP_CFG_BANK_SEL_IN : in std_logic_vector(3 downto 0); - IP_CFG_DONE_OUT : out std_logic; - IP_CFG_MEM_ADDR_OUT : out std_logic_vector(7 downto 0); - IP_CFG_MEM_DATA_IN : in std_logic_vector(31 downto 0); - IP_CFG_MEM_CLK_OUT : out std_logic; - MR_RESET_IN : in std_logic; - MR_MODE_IN : in std_logic; - MR_RESTART_IN : in std_logic; - -- gk 29.03.10 - SLV_ADDR_IN : in std_logic_vector(7 downto 0); - SLV_READ_IN : in std_logic; - SLV_WRITE_IN : in std_logic; - SLV_BUSY_OUT : out std_logic; - SLV_ACK_OUT : out std_logic; - SLV_DATA_IN : in std_logic_vector(31 downto 0); - SLV_DATA_OUT : out std_logic_vector(31 downto 0); - -- gk 22.04.10 - -- registers setup interface - BUS_ADDR_IN : in std_logic_vector(7 downto 0); - BUS_DATA_IN : in std_logic_vector(31 downto 0); - BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 - BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 - BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 - BUS_ACK_OUT : out std_logic; -- gk 26.04.10 - -- gk 23.04.10 - LED_PACKET_SENT_OUT : out std_logic; - LED_AN_DONE_N_OUT : out std_logic; - -- CTS interface - CTS_NUMBER_IN : in std_logic_vector (15 downto 0); - CTS_CODE_IN : in std_logic_vector (7 downto 0); - CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); - CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); - CTS_START_READOUT_IN : in std_logic; - CTS_DATA_OUT : out std_logic_vector (31 downto 0); - CTS_DATAREADY_OUT : out std_logic; - CTS_READOUT_FINISHED_OUT : out std_logic; - CTS_READ_IN : in std_logic; - CTS_LENGTH_OUT : out std_logic_vector (15 downto 0); - CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0); - -- Data payload interface - FEE_DATA_IN : in std_logic_vector (15 downto 0); - FEE_DATAREADY_IN : in std_logic; - FEE_READ_OUT : out std_logic; - FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); - FEE_BUSY_IN : in std_logic; - --SFP Connection - SFP_RXD_P_IN : in std_logic; - SFP_RXD_N_IN : in std_logic; - SFP_TXD_P_OUT : out std_logic; - SFP_TXD_N_OUT : out std_logic; - SFP_REFCLK_P_IN : in std_logic; - SFP_REFCLK_N_IN : in std_logic; - SFP_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) - SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) - SFP_TXDIS_OUT : out std_logic; -- SFP disable - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- PacketConstructor interface - IG_CTS_CTR_TST : out std_logic_vector(2 downto 0); - IG_REM_CTR_TST : out std_logic_vector(3 downto 0); - IG_BSM_LOAD_TST : out std_logic_vector(3 downto 0); - IG_BSM_SAVE_TST : out std_logic_vector(3 downto 0); - IG_DATA_TST : out std_logic_vector(15 downto 0); - IG_WCNT_TST : out std_logic_vector(15 downto 0); - IG_RCNT_TST : out std_logic_vector(16 downto 0); - IG_RD_EN_TST : out std_logic; - IG_WR_EN_TST : out std_logic; - IG_EMPTY_TST : out std_logic; - IG_AEMPTY_TST : out std_logic; - IG_FULL_TST : out std_logic; - IG_AFULL_TST : out std_logic; - PC_WR_EN_TST : out std_logic; - PC_DATA_TST : out std_logic_vector (7 downto 0); - PC_READY_TST : out std_logic; - PC_START_OF_SUB_TST : out std_logic; - PC_END_OF_DATA_TST : out std_logic; - PC_SUB_SIZE_TST : out std_logic_vector(31 downto 0); - PC_TRIG_NR_TST : out std_logic_vector(31 downto 0); - PC_PADDING_TST : out std_logic; - PC_DECODING_TST : out std_logic_vector(31 downto 0); - PC_EVENT_ID_TST : out std_logic_vector(31 downto 0); - PC_QUEUE_DEC_TST : out std_logic_vector(31 downto 0); - PC_BSM_CONSTR_TST : out std_logic_vector(3 downto 0); - PC_BSM_LOAD_TST : out std_logic_vector(3 downto 0); - PC_BSM_SAVE_TST : out std_logic_vector(3 downto 0); - PC_SHF_EMPTY_TST : out std_logic; - PC_SHF_FULL_TST : out std_logic; - PC_SHF_WR_EN_TST : out std_logic; - PC_SHF_RD_EN_TST : out std_logic; - PC_SHF_Q_TST : out std_logic_vector(7 downto 0); - PC_DF_EMPTY_TST : out std_logic; - PC_DF_FULL_TST : out std_logic; - PC_DF_WR_EN_TST : out std_logic; - PC_DF_RD_EN_TST : out std_logic; - PC_DF_Q_TST : out std_logic_vector(7 downto 0); - PC_ALL_CTR_TST : out std_logic_vector(4 downto 0); - PC_SUB_CTR_TST : out std_logic_vector(4 downto 0); - PC_BYTES_LOADED_TST : out std_logic_vector(15 downto 0); - PC_SIZE_LEFT_TST : out std_logic_vector(31 downto 0); - PC_SUB_SIZE_TO_SAVE_TST : out std_logic_vector(31 downto 0); - PC_SUB_SIZE_LOADED_TST : out std_logic_vector(31 downto 0); - PC_SUB_BYTES_LOADED_TST : out std_logic_vector(31 downto 0); - PC_QUEUE_SIZE_TST : out std_logic_vector(31 downto 0); - PC_ACT_QUEUE_SIZE_TST : out std_logic_vector(31 downto 0); - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- FrameConstructor interface - FC_WR_EN_TST : out std_logic; - FC_DATA_TST : out std_logic_vector(7 downto 0); - FC_H_READY_TST : out std_logic; - FC_READY_TST : out std_logic; - FC_IP_SIZE_TST : out std_logic_vector(15 downto 0); - FC_UDP_SIZE_TST : out std_logic_vector(15 downto 0); - FC_IDENT_TST : out std_logic_vector(15 downto 0); - FC_FLAGS_OFFSET_TST : out std_logic_vector(15 downto 0); - FC_SOD_TST : out std_logic; - FC_EOD_TST : out std_logic; - FC_BSM_CONSTR_TST : out std_logic_vector(7 downto 0); - FC_BSM_TRANS_TST : out std_logic_vector(3 downto 0); - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- FrameTransmitter interface - FT_DATA_TST : out std_logic_vector(8 downto 0); - FT_TX_EMPTY_TST : out std_logic; - FT_START_OF_PACKET_TST : out std_logic; - FT_BSM_INIT_TST : out std_logic_vector(3 downto 0); - FT_BSM_MAC_TST : out std_logic_vector(3 downto 0); - FT_BSM_TRANS_TST : out std_logic_vector(3 downto 0); - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- MAC interface - MAC_HADDR_TST : out std_logic_vector(7 downto 0); - MAC_HDATA_TST : out std_logic_vector(7 downto 0); - MAC_HCS_TST : out std_logic; - MAC_HWRITE_TST : out std_logic; - MAC_HREAD_TST : out std_logic; - MAC_HREADY_TST : out std_logic; - MAC_HDATA_EN_TST : out std_logic; - MAC_FIFOAVAIL_TST : out std_logic; - MAC_FIFOEOF_TST : out std_logic; - MAC_FIFOEMPTY_TST : out std_logic; - MAC_TX_READ_TST : out std_logic; - MAC_TX_DONE_TST : out std_logic; - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- pcs and serdes - PCS_AN_LP_ABILITY_TST : out std_logic_vector(15 downto 0); - PCS_AN_COMPLETE_TST : out std_logic; - PCS_AN_PAGE_RX_TST : out std_logic; - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- debug ports - ANALYZER_DEBUG_OUT : out std_logic_vector(63 downto 0) -); -end component; - -component gbe_setup is -port( - CLK : in std_logic; - RESET : in std_logic; - - -- interface to regio bus - BUS_ADDR_IN : in std_logic_vector(7 downto 0); - BUS_DATA_IN : in std_logic_vector(31 downto 0); - BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 - BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 - BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 - BUS_ACK_OUT : out std_logic; -- gk 26.04.10 - - -- gk 26.04.10 - -- input from gbe_buf (only to return the whole trigger number via regio) - GBE_TRIG_NR_IN : in std_logic_vector(31 downto 0); - - -- output to gbe_buf - GBE_SUBEVENT_ID_OUT : out std_logic_vector(31 downto 0); - GBE_SUBEVENT_DEC_OUT : out std_logic_vector(31 downto 0); - GBE_QUEUE_DEC_OUT : out std_logic_vector(31 downto 0); - GBE_MAX_PACKET_OUT : out std_logic_vector(31 downto 0); - GBE_MAX_FRAME_OUT : out std_logic_vector(15 downto 0); - GBE_USE_GBE_OUT : out std_logic; - GBE_USE_TRBNET_OUT : out std_logic; - GBE_USE_MULTIEVENTS_OUT : out std_logic; - GBE_READOUT_CTR_OUT : out std_logic_vector(23 downto 0); -- gk 26.04.10 - GBE_READOUT_CTR_VALID_OUT : out std_logic; -- gk 26.04.10 - GBE_DELAY_OUT : out std_logic_vector(31 downto 0); - -- gk 01.06.10 - DBG_IPU2GBE1_IN : in std_logic_vector(31 downto 0); - DBG_IPU2GBE2_IN : in std_logic_vector(31 downto 0); - DBG_PC1_IN : in std_logic_vector(31 downto 0); - DBG_PC2_IN : in std_logic_vector(31 downto 0); - DBG_FC1_IN : in std_logic_vector(31 downto 0); - DBG_FC2_IN : in std_logic_vector(31 downto 0); - DBG_FT1_IN : in std_logic_vector(31 downto 0); - DBG_FT2_IN : in std_logic_vector(31 downto 0) -); -end component; +-- component trb_net16_gbe_buf is +-- generic( +-- DO_SIMULATION : integer range 0 to 1 := 1; +-- USE_125MHZ_EXTCLK : integer range 0 to 1 := 1 +-- ); +-- port( +-- CLK : in std_logic; +-- TEST_CLK : in std_logic; -- only for simulation! +-- CLK_125_TX_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode +-- CLK_125_RX_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode +-- RESET : in std_logic; +-- GSR_N : in std_logic; +-- -- Debug +-- STAGE_STAT_REGS_OUT : out std_logic_vector(31 downto 0); +-- STAGE_CTRL_REGS_IN : in std_logic_vector(31 downto 0); +-- -- configuration interface +-- IP_CFG_START_IN : in std_logic; +-- IP_CFG_BANK_SEL_IN : in std_logic_vector(3 downto 0); +-- IP_CFG_DONE_OUT : out std_logic; +-- IP_CFG_MEM_ADDR_OUT : out std_logic_vector(7 downto 0); +-- IP_CFG_MEM_DATA_IN : in std_logic_vector(31 downto 0); +-- IP_CFG_MEM_CLK_OUT : out std_logic; +-- MR_RESET_IN : in std_logic; +-- MR_MODE_IN : in std_logic; +-- MR_RESTART_IN : in std_logic; +-- -- gk 29.03.10 +-- SLV_ADDR_IN : in std_logic_vector(7 downto 0); +-- SLV_READ_IN : in std_logic; +-- SLV_WRITE_IN : in std_logic; +-- SLV_BUSY_OUT : out std_logic; +-- SLV_ACK_OUT : out std_logic; +-- SLV_DATA_IN : in std_logic_vector(31 downto 0); +-- SLV_DATA_OUT : out std_logic_vector(31 downto 0); +-- -- gk 22.04.10 +-- -- registers setup interface +-- BUS_ADDR_IN : in std_logic_vector(7 downto 0); +-- BUS_DATA_IN : in std_logic_vector(31 downto 0); +-- BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 +-- BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 +-- BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 +-- BUS_ACK_OUT : out std_logic; -- gk 26.04.10 +-- -- gk 23.04.10 +-- LED_PACKET_SENT_OUT : out std_logic; +-- LED_AN_DONE_N_OUT : out std_logic; +-- -- CTS interface +-- CTS_NUMBER_IN : in std_logic_vector (15 downto 0); +-- CTS_CODE_IN : in std_logic_vector (7 downto 0); +-- CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); +-- CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); +-- CTS_START_READOUT_IN : in std_logic; +-- CTS_DATA_OUT : out std_logic_vector (31 downto 0); +-- CTS_DATAREADY_OUT : out std_logic; +-- CTS_READOUT_FINISHED_OUT : out std_logic; +-- CTS_READ_IN : in std_logic; +-- CTS_LENGTH_OUT : out std_logic_vector (15 downto 0); +-- CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0); +-- -- Data payload interface +-- FEE_DATA_IN : in std_logic_vector (15 downto 0); +-- FEE_DATAREADY_IN : in std_logic; +-- FEE_READ_OUT : out std_logic; +-- FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); +-- FEE_BUSY_IN : in std_logic; +-- --SFP Connection +-- SFP_RXD_P_IN : in std_logic; +-- SFP_RXD_N_IN : in std_logic; +-- SFP_TXD_P_OUT : out std_logic; +-- SFP_TXD_N_OUT : out std_logic; +-- SFP_REFCLK_P_IN : in std_logic; +-- SFP_REFCLK_N_IN : in std_logic; +-- SFP_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) +-- SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) +-- SFP_TXDIS_OUT : out std_logic; -- SFP disable +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- PacketConstructor interface +-- IG_CTS_CTR_TST : out std_logic_vector(2 downto 0); +-- IG_REM_CTR_TST : out std_logic_vector(3 downto 0); +-- IG_BSM_LOAD_TST : out std_logic_vector(3 downto 0); +-- IG_BSM_SAVE_TST : out std_logic_vector(3 downto 0); +-- IG_DATA_TST : out std_logic_vector(15 downto 0); +-- IG_WCNT_TST : out std_logic_vector(15 downto 0); +-- IG_RCNT_TST : out std_logic_vector(16 downto 0); +-- IG_RD_EN_TST : out std_logic; +-- IG_WR_EN_TST : out std_logic; +-- IG_EMPTY_TST : out std_logic; +-- IG_AEMPTY_TST : out std_logic; +-- IG_FULL_TST : out std_logic; +-- IG_AFULL_TST : out std_logic; +-- PC_WR_EN_TST : out std_logic; +-- PC_DATA_TST : out std_logic_vector (7 downto 0); +-- PC_READY_TST : out std_logic; +-- PC_START_OF_SUB_TST : out std_logic; +-- PC_END_OF_DATA_TST : out std_logic; +-- PC_SUB_SIZE_TST : out std_logic_vector(31 downto 0); +-- PC_TRIG_NR_TST : out std_logic_vector(31 downto 0); +-- PC_PADDING_TST : out std_logic; +-- PC_DECODING_TST : out std_logic_vector(31 downto 0); +-- PC_EVENT_ID_TST : out std_logic_vector(31 downto 0); +-- PC_QUEUE_DEC_TST : out std_logic_vector(31 downto 0); +-- PC_BSM_CONSTR_TST : out std_logic_vector(3 downto 0); +-- PC_BSM_LOAD_TST : out std_logic_vector(3 downto 0); +-- PC_BSM_SAVE_TST : out std_logic_vector(3 downto 0); +-- PC_SHF_EMPTY_TST : out std_logic; +-- PC_SHF_FULL_TST : out std_logic; +-- PC_SHF_WR_EN_TST : out std_logic; +-- PC_SHF_RD_EN_TST : out std_logic; +-- PC_SHF_Q_TST : out std_logic_vector(7 downto 0); +-- PC_DF_EMPTY_TST : out std_logic; +-- PC_DF_FULL_TST : out std_logic; +-- PC_DF_WR_EN_TST : out std_logic; +-- PC_DF_RD_EN_TST : out std_logic; +-- PC_DF_Q_TST : out std_logic_vector(7 downto 0); +-- PC_ALL_CTR_TST : out std_logic_vector(4 downto 0); +-- PC_SUB_CTR_TST : out std_logic_vector(4 downto 0); +-- PC_BYTES_LOADED_TST : out std_logic_vector(15 downto 0); +-- PC_SIZE_LEFT_TST : out std_logic_vector(31 downto 0); +-- PC_SUB_SIZE_TO_SAVE_TST : out std_logic_vector(31 downto 0); +-- PC_SUB_SIZE_LOADED_TST : out std_logic_vector(31 downto 0); +-- PC_SUB_BYTES_LOADED_TST : out std_logic_vector(31 downto 0); +-- PC_QUEUE_SIZE_TST : out std_logic_vector(31 downto 0); +-- PC_ACT_QUEUE_SIZE_TST : out std_logic_vector(31 downto 0); +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- FrameConstructor interface +-- FC_WR_EN_TST : out std_logic; +-- FC_DATA_TST : out std_logic_vector(7 downto 0); +-- FC_H_READY_TST : out std_logic; +-- FC_READY_TST : out std_logic; +-- FC_IP_SIZE_TST : out std_logic_vector(15 downto 0); +-- FC_UDP_SIZE_TST : out std_logic_vector(15 downto 0); +-- FC_IDENT_TST : out std_logic_vector(15 downto 0); +-- FC_FLAGS_OFFSET_TST : out std_logic_vector(15 downto 0); +-- FC_SOD_TST : out std_logic; +-- FC_EOD_TST : out std_logic; +-- FC_BSM_CONSTR_TST : out std_logic_vector(7 downto 0); +-- FC_BSM_TRANS_TST : out std_logic_vector(3 downto 0); +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- FrameTransmitter interface +-- FT_DATA_TST : out std_logic_vector(8 downto 0); +-- FT_TX_EMPTY_TST : out std_logic; +-- FT_START_OF_PACKET_TST : out std_logic; +-- FT_BSM_INIT_TST : out std_logic_vector(3 downto 0); +-- FT_BSM_MAC_TST : out std_logic_vector(3 downto 0); +-- FT_BSM_TRANS_TST : out std_logic_vector(3 downto 0); +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- MAC interface +-- MAC_HADDR_TST : out std_logic_vector(7 downto 0); +-- MAC_HDATA_TST : out std_logic_vector(7 downto 0); +-- MAC_HCS_TST : out std_logic; +-- MAC_HWRITE_TST : out std_logic; +-- MAC_HREAD_TST : out std_logic; +-- MAC_HREADY_TST : out std_logic; +-- MAC_HDATA_EN_TST : out std_logic; +-- MAC_FIFOAVAIL_TST : out std_logic; +-- MAC_FIFOEOF_TST : out std_logic; +-- MAC_FIFOEMPTY_TST : out std_logic; +-- MAC_TX_READ_TST : out std_logic; +-- MAC_TX_DONE_TST : out std_logic; +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- pcs and serdes +-- PCS_AN_LP_ABILITY_TST : out std_logic_vector(15 downto 0); +-- PCS_AN_COMPLETE_TST : out std_logic; +-- PCS_AN_PAGE_RX_TST : out std_logic; +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- debug ports +-- ANALYZER_DEBUG_OUT : out std_logic_vector(63 downto 0) +-- ); +-- end component; + +-- component gbe_setup is +-- port( +-- CLK : in std_logic; +-- RESET : in std_logic; +-- +-- -- interface to regio bus +-- BUS_ADDR_IN : in std_logic_vector(7 downto 0); +-- BUS_DATA_IN : in std_logic_vector(31 downto 0); +-- BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 +-- BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 +-- BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 +-- BUS_ACK_OUT : out std_logic; -- gk 26.04.10 +-- +-- -- gk 26.04.10 +-- -- input from gbe_buf (only to return the whole trigger number via regio) +-- GBE_TRIG_NR_IN : in std_logic_vector(31 downto 0); +-- +-- -- output to gbe_buf +-- GBE_SUBEVENT_ID_OUT : out std_logic_vector(31 downto 0); +-- GBE_SUBEVENT_DEC_OUT : out std_logic_vector(31 downto 0); +-- GBE_QUEUE_DEC_OUT : out std_logic_vector(31 downto 0); +-- GBE_MAX_PACKET_OUT : out std_logic_vector(31 downto 0); +-- GBE_MIN_PACKET_OUT : out std_logic_vector(31 downto 0); +-- GBE_MAX_FRAME_OUT : out std_logic_vector(15 downto 0); +-- GBE_USE_GBE_OUT : out std_logic; +-- GBE_USE_TRBNET_OUT : out std_logic; +-- GBE_USE_MULTIEVENTS_OUT : out std_logic; +-- GBE_READOUT_CTR_OUT : out std_logic_vector(23 downto 0); -- gk 26.04.10 +-- GBE_READOUT_CTR_VALID_OUT : out std_logic; -- gk 26.04.10 +-- GBE_DELAY_OUT : out std_logic_vector(31 downto 0); +-- -- gk 01.06.10 +-- DBG_IPU2GBE1_IN : in std_logic_vector(31 downto 0); +-- DBG_IPU2GBE2_IN : in std_logic_vector(31 downto 0); +-- DBG_PC1_IN : in std_logic_vector(31 downto 0); +-- DBG_PC2_IN : in std_logic_vector(31 downto 0); +-- DBG_FC1_IN : in std_logic_vector(31 downto 0); +-- DBG_FC2_IN : in std_logic_vector(31 downto 0); +-- DBG_FT1_IN : in std_logic_vector(31 downto 0); +-- DBG_FT2_IN : in std_logic_vector(31 downto 0) +-- ); +-- end component; component trb_net16_hub_streaming_port_sctrl is generic( diff --git a/trb_net_components.vhd b/trb_net_components.vhd index 723b84b..dc3e06d 100644 --- a/trb_net_components.vhd +++ b/trb_net_components.vhd @@ -1582,82 +1582,83 @@ component trb_net16_ipudata is STAT_DEBUG : out std_logic_vector(31 downto 0) ); end component; - -component trb_net16_gbe_buf is -generic( -DO_SIMULATION : integer range 0 to 1 := 1; -USE_125MHZ_EXTCLK : integer range 0 to 1 := 1 -); -port( -CLK : in std_logic; -TEST_CLK : in std_logic; -- only for simulation! -CLK_125_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode -RESET : in std_logic; -GSR_N : in std_logic; --- Debug -STAGE_STAT_REGS_OUT : out std_logic_vector(31 downto 0); -STAGE_CTRL_REGS_IN : in std_logic_vector(31 downto 0); --- configuration interface -IP_CFG_START_IN : in std_logic; -IP_CFG_BANK_SEL_IN : in std_logic_vector(3 downto 0); -IP_CFG_DONE_OUT : out std_logic; -IP_CFG_MEM_ADDR_OUT : out std_logic_vector(7 downto 0); -IP_CFG_MEM_DATA_IN : in std_logic_vector(31 downto 0); -IP_CFG_MEM_CLK_OUT : out std_logic; -MR_RESET_IN : in std_logic; -MR_MODE_IN : in std_logic; -MR_RESTART_IN : in std_logic; --- gk 29.03.10 -SLV_ADDR_IN : in std_logic_vector(7 downto 0); -SLV_READ_IN : in std_logic; -SLV_WRITE_IN : in std_logic; -SLV_BUSY_OUT : out std_logic; -SLV_ACK_OUT : out std_logic; -SLV_DATA_IN : in std_logic_vector(31 downto 0); -SLV_DATA_OUT : out std_logic_vector(31 downto 0); --- gk 22.04.10 --- registers setup interface -BUS_ADDR_IN : in std_logic_vector(7 downto 0); -BUS_DATA_IN : in std_logic_vector(31 downto 0); -BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 -BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 -BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 -BUS_ACK_OUT : out std_logic; -- gk 26.04.10 --- gk 23.04.10 -LED_PACKET_SENT_OUT : out std_logic; -LED_AN_DONE_N_OUT : out std_logic; --- CTS interface -CTS_NUMBER_IN : in std_logic_vector (15 downto 0); -CTS_CODE_IN : in std_logic_vector (7 downto 0); -CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); -CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); -CTS_START_READOUT_IN : in std_logic; -CTS_DATA_OUT : out std_logic_vector (31 downto 0); -CTS_DATAREADY_OUT : out std_logic; -CTS_READOUT_FINISHED_OUT : out std_logic; -CTS_READ_IN : in std_logic; -CTS_LENGTH_OUT : out std_logic_vector (15 downto 0); -CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0); --- Data payload interface -FEE_DATA_IN : in std_logic_vector (15 downto 0); -FEE_DATAREADY_IN : in std_logic; -FEE_READ_OUT : out std_logic; -FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); -FEE_BUSY_IN : in std_logic; ---SFP Connection -SFP_RXD_P_IN : in std_logic; -SFP_RXD_N_IN : in std_logic; -SFP_TXD_P_OUT : out std_logic; -SFP_TXD_N_OUT : out std_logic; -SFP_REFCLK_P_IN : in std_logic; -SFP_REFCLK_N_IN : in std_logic; -SFP_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) -SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) -SFP_TXDIS_OUT : out std_logic; -- SFP disable --- debug ports -ANALYZER_DEBUG_OUT : out std_logic_vector(63 downto 0) -); -end component; +-- +-- component trb_net16_gbe_buf is +-- generic( +-- DO_SIMULATION : integer range 0 to 1 := 1; +-- USE_125MHZ_EXTCLK : integer range 0 to 1 := 1 +-- ); +-- port( +-- CLK : in std_logic; +-- TEST_CLK : in std_logic; -- only for simulation! +-- CLK_125_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode +-- RESET : in std_logic; +-- GSR_N : in std_logic; +-- -- Debug +-- STAGE_STAT_REGS_OUT : out std_logic_vector(31 downto 0); +-- STAGE_CTRL_REGS_IN : in std_logic_vector(31 downto 0); +-- -- configuration interface +-- IP_CFG_START_IN : in std_logic; +-- IP_CFG_BANK_SEL_IN : in std_logic_vector(3 downto 0); +-- IP_CFG_DONE_OUT : out std_logic; +-- IP_CFG_MEM_ADDR_OUT : out std_logic_vector(7 downto 0); +-- IP_CFG_MEM_DATA_IN : in std_logic_vector(31 downto 0); +-- IP_CFG_MEM_CLK_OUT : out std_logic; +-- MR_RESET_IN : in std_logic; +-- MR_MODE_IN : in std_logic; +-- MR_RESTART_IN : in std_logic; +-- -- gk 29.03.10 +-- SLV_ADDR_IN : in std_logic_vector(7 downto 0); +-- SLV_READ_IN : in std_logic; +-- SLV_WRITE_IN : in std_logic; +-- SLV_BUSY_OUT : out std_logic; +-- SLV_ACK_OUT : out std_logic; +-- SLV_DATA_IN : in std_logic_vector(31 downto 0); +-- SLV_DATA_OUT : out std_logic_vector(31 downto 0); +-- -- gk 22.04.10 +-- -- registers setup interface +-- BUS_ADDR_IN : in std_logic_vector(7 downto 0); +-- BUS_DATA_IN : in std_logic_vector(31 downto 0); +-- BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 +-- BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 +-- BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 +-- BUS_ACK_OUT : out std_logic; -- gk 26.04.10 +-- -- gk 23.04.10 +-- LED_PACKET_SENT_OUT : out std_logic; +-- LED_AN_DONE_N_OUT : out std_logic; +-- -- CTS interface +-- CTS_NUMBER_IN : in std_logic_vector (15 downto 0); +-- CTS_CODE_IN : in std_logic_vector (7 downto 0); +-- CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); +-- CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); +-- CTS_START_READOUT_IN : in std_logic; +-- CTS_DATA_OUT : out std_logic_vector (31 downto 0); +-- CTS_DATAREADY_OUT : out std_logic; +-- CTS_READOUT_FINISHED_OUT : out std_logic; +-- CTS_READ_IN : in std_logic; +-- CTS_LENGTH_OUT : out std_logic_vector (15 downto 0); +-- CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0); +-- -- Data payload interface +-- FEE_DATA_IN : in std_logic_vector (15 downto 0); +-- FEE_DATAREADY_IN : in std_logic; +-- FEE_READ_OUT : out std_logic; +-- FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); +-- FEE_BUSY_IN : in std_logic; +-- --SFP Connection +-- SFP_RXD_P_IN : in std_logic; +-- SFP_RXD_N_IN : in std_logic; +-- SFP_TXD_P_OUT : out std_logic; +-- SFP_TXD_N_OUT : out std_logic; +-- SFP_REFCLK_P_IN : in std_logic; +-- SFP_REFCLK_N_IN : in std_logic; +-- SFP_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) +-- SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) +-- SFP_TXDIS_OUT : out std_logic; -- SFP disable +-- -- debug ports +-- MC_UNIQUE_ID_IN : in std_logic_vector(63 downto 0); +-- ANALYZER_DEBUG_OUT : out std_logic_vector(63 downto 0) +-- ); +-- end component; @@ -2452,8 +2453,10 @@ end component; component pll_in200_out100 is port ( + RESET : in std_logic := '0'; CLK: in std_logic; CLKOP: out std_logic; + CLKOK: out std_logic; CLKOS: out std_logic; LOCK: out std_logic );