From: Andreas Neiser <neiser@kph.uni-mainz.de>
Date: Wed, 16 Jul 2014 08:04:01 +0000 (+0200)
Subject: ADC: Keeping the ADC SPI pins low (also PULLMODE=DOWN), prevent entering power on... 
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=92237b75bdf739aeb7d596ca995c65be2512457d;p=trb3.git

ADC: Keeping the ADC SPI pins low (also PULLMODE=DOWN), prevent entering power on test mode
---

diff --git a/ADC/trb3_periph_adc.vhd b/ADC/trb3_periph_adc.vhd
index a1d3b8a..b27583a 100644
--- a/ADC/trb3_periph_adc.vhd
+++ b/ADC/trb3_periph_adc.vhd
@@ -585,7 +585,7 @@ THE_SPI_RELOAD : entity work.spi_flash_and_fpga_reload
   FPGA_SDI(0) <= spi_SDO     when spi_CS(2 downto 0) /= b"111" else '0';
   spi_SDI     <= FPGA_SDO(0) when spi_CS(2 downto 0) /= b"111" else '0';
   
-  SPI_ADC_SCK         <= spi_SCK when spi_CS(3) = '0' else '1';
+  SPI_ADC_SCK         <= spi_SCK when spi_CS(3) = '0' else '0';
   SPI_ADC_SDIO        <= spi_SDO when spi_CS(3) = '0' else '0';
   
   LMK_CLK             <= spi_SCK when spi_CS(5 downto 4) /= b"11" else '1' ;