From: Ingo Froehlich Date: Tue, 22 Aug 2017 14:33:24 +0000 (+0200) Subject: new dirich flash scheme, IF X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=93c132b78f9c3f54859106593c36ad5f6a514a83;p=dirich.git new dirich flash scheme, IF --- 93c132b78f9c3f54859106593c36ad5f6a514a83 diff --cc thresholds/thresholds.prj index a9a4dde,7b41ec9..d570bd6 --- a/thresholds/thresholds.prj +++ b/thresholds/thresholds.prj @@@ -12,13 -8,10 +8,9 @@@ add_file -vhdl -lib work "../../trbnet/ add_file -vhdl -lib work "../../vhdlbasics/interface/spi_slave.vhd" add_file -vhdl -lib work "../../vhdlbasics/machxo3/sedcheck.vhd" add_file -vhdl -lib work "../../vhdlbasics/io/pwm.vhd" - #add_file -vhdl -lib work "../../logicbox/UFM_control/UFM_control.vhd" -add_file -vhdl -lib work "../../logicbox/UFM_control/UFM_control.vhd" + -add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/flashram.vhd" -add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/flash.vhd" +add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/flashram.vhd" +add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/flash.vhd" - - - #add_file -vhdl -lib work "../../logicbox/cores/flashram.vhd" - #add_file -vhdl -lib work "cores/efb.vhd" add_file -verilog -lib work "../../vhdlbasics/machxo3/flash/efb_define_def.v" add_file -verilog -lib work "../../vhdlbasics/machxo3/flash/UFM_WB.v"