From: Jan Michel Date: Mon, 20 May 2019 14:43:29 +0000 (+0200) Subject: update basic constraints and add I/O for RPC TDC X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=9623f76173fc352fecc48d5fb6088b4172c1ee2b;p=trb3sc.git update basic constraints and add I/O for RPC TDC --- diff --git a/pinout/basic_constraints.lpf b/pinout/basic_constraints.lpf index e2fa188..57727f0 100644 --- a/pinout/basic_constraints.lpf +++ b/pinout/basic_constraints.lpf @@ -32,13 +32,19 @@ MULTICYCLE FROM CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/final_reset*" 30 ns; GSR_NET NET "GSR_N"; -MULTICYCLE TO CELL "THE_MEDIA_INT*/sci*" 20 ns; -MULTICYCLE FROM CELL "THE_MEDIA_INT*/sci*" 20 ns; -MULTICYCLE TO CELL "THE_MEDIA_INT*/PROC_SCI_CTRL.wa*" 20 ns; -BLOCK PATH TO CLKNET "THE_MEDIA_INT*/sci_write_i"; -BLOCK PATH FROM CLKNET "THE_MEDIA_INT*/sci_write_i"; -BLOCK PATH TO CLKNET "THE_MEDIA_INT*/sci_read_i"; -BLOCK PATH FROM CLKNET "THE_MEDIA_INT*/sci_read_i"; +BLOCK PATH TO CELL "THE_TOOLS/gen_STATISTICS.THE_STAT_LOGIC/inp_reg*"; +BLOCK PATH FROM CELL "THE_TOOLS/gen_TRIG_LOGIC.THE_TRIG_LOGIC/inp_verylong*"; +BLOCK PATH TO CELL "THE_TOOLS/gen_TRIG_LOGIC.THE_TRIG_LOGIC/out_reg*"; + + +BLOCK PATH FROM CLKNET "*/sci_read_i"; +BLOCK PATH FROM CLKNET "*/sci_write_i"; + + +MULTICYCLE TO CELL "*/sci*" 20 ns; +MULTICYCLE FROM CELL "*/sci*" 20 ns; +MULTICYCLE TO CELL "*/PROC_SCI_CTRL.wa*" 20 ns; +BLOCK PATH TO CELL "*/sci_addr_*"; FREQUENCY NET "THE_MEDIA_INT*/clk_rx_full" 200 MHz; # HOLD_MARGIN 500 ps FREQUENCY NET "THE_MEDIA_INT*/clk_tx_full" 200 MHz; # HOLD_MARGIN 500 ps diff --git a/pinout/trb3sc_ada.lpf b/pinout/trb3sc_ada.lpf index f155e41..df2b5ae 100644 --- a/pinout/trb3sc_ada.lpf +++ b/pinout/trb3sc_ada.lpf @@ -278,7 +278,7 @@ LOCATE COMP "INP_9" SITE "AD5"; #was "DQSLL2_T" 37 LOCATE COMP "INP_10" SITE "AA9"; #was "DQLL2_3_P" 41 LOCATE COMP "INP_11" SITE "AB7"; #was "DQLL2_4_P" 45 LOCATE COMP "INP_12" SITE "N4"; #was "DQUL3_0_P" 49 -LOCATE COMP "INP_13" SITE="N2"; #was "DQUL3_1_P" 53 +LOCATE COMP "INP_13" SITE "N2"; #was "DQUL3_1_P" 53 LOCATE COMP "INP_14" SITE "M5"; #was "DQUL3_2_P" 57; LOCATE COMP "INP_15" SITE "M10"; #was "DQSUL3_T" 61; @@ -332,40 +332,40 @@ LOCATE COMP "INP_60" SITE "W30"; #was "DQLR2_0_P" 170 LOCATE COMP "INP_61" SITE "W27"; #was "DQLR2_1_P" 174 LOCATE COMP "INP_62" SITE "W34"; #was "DQLR2_2_P" 178 LOCATE COMP "INP_63" SITE "Y30"; #was "DQSLR2_T" 182 -#on KEL1 -LOCATE COMP "INP_64" SITE "AP5"; -LOCATE COMP "INP_65" SITE "AP2"; -LOCATE COMP "INP_66" SITE "AN1"; -LOCATE COMP "INP_67" SITE "AN3"; -LOCATE COMP "INP_68" SITE "AL5"; -LOCATE COMP "INP_69" SITE "AM6"; -LOCATE COMP "INP_70" SITE "AL4"; -LOCATE COMP "INP_71" SITE "AJ5"; -LOCATE COMP "INP_72" SITE "AJ2"; -LOCATE COMP "INP_73" SITE "AL3"; -LOCATE COMP "INP_74" SITE "AD9"; -LOCATE COMP "INP_75" SITE "AJ4"; -LOCATE COMP "INP_76" SITE "V4"; -LOCATE COMP "INP_77" SITE "V5"; -LOCATE COMP "INP_78" SITE "T9"; -LOCATE COMP "INP_79" SITE "T2"; - #on KEL2 -LOCATE COMP "INP_80" SITE "AP29"; -LOCATE COMP "INP_81" SITE "AP33"; -LOCATE COMP "INP_82" SITE "AN34"; -LOCATE COMP "INP_83" SITE "AP31"; -LOCATE COMP "INP_84" SITE "AN32"; -LOCATE COMP "INP_85" SITE "AM29"; -LOCATE COMP "INP_86" SITE "AL31"; -LOCATE COMP "INP_87" SITE "AL30"; -LOCATE COMP "INP_88" SITE "AL34"; -LOCATE COMP "INP_89" SITE "AJ31"; -LOCATE COMP "INP_90" SITE "AH33"; -LOCATE COMP "INP_91" SITE "AL32"; -LOCATE COMP "INP_92" SITE "AF32"; -LOCATE COMP "INP_93" SITE "AE32"; -LOCATE COMP "INP_94" SITE "AE30"; -LOCATE COMP "INP_95" SITE "AD26"; +# #on KEL1 +# LOCATE COMP "INP_64" SITE "AP5"; +# LOCATE COMP "INP_65" SITE "AP2"; +# LOCATE COMP "INP_66" SITE "AN1"; +# LOCATE COMP "INP_67" SITE "AN3"; +# LOCATE COMP "INP_68" SITE "AL5"; +# LOCATE COMP "INP_69" SITE "AM6"; +# LOCATE COMP "INP_70" SITE "AL4"; +# LOCATE COMP "INP_71" SITE "AJ5"; +# LOCATE COMP "INP_72" SITE "AJ2"; +# LOCATE COMP "INP_73" SITE "AL3"; +# LOCATE COMP "INP_74" SITE "AD9"; +# LOCATE COMP "INP_75" SITE "AJ4"; +# LOCATE COMP "INP_76" SITE "V4"; +# LOCATE COMP "INP_77" SITE "V5"; +# LOCATE COMP "INP_78" SITE "T9"; +# LOCATE COMP "INP_79" SITE "T2"; +# #on KEL2 +# LOCATE COMP "INP_80" SITE "AP29"; +# LOCATE COMP "INP_81" SITE "AP33"; +# LOCATE COMP "INP_82" SITE "AN34"; +# LOCATE COMP "INP_83" SITE "AP31"; +# LOCATE COMP "INP_84" SITE "AN32"; +# LOCATE COMP "INP_85" SITE "AM29"; +# LOCATE COMP "INP_86" SITE "AL31"; +# LOCATE COMP "INP_87" SITE "AL30"; +# LOCATE COMP "INP_88" SITE "AL34"; +# LOCATE COMP "INP_89" SITE "AJ31"; +# LOCATE COMP "INP_90" SITE "AH33"; +# LOCATE COMP "INP_91" SITE "AL32"; +# LOCATE COMP "INP_92" SITE "AF32"; +# LOCATE COMP "INP_93" SITE "AE32"; +# LOCATE COMP "INP_94" SITE "AE30"; +# LOCATE COMP "INP_95" SITE "AD26"; DEFINE PORT GROUP "INP_group" "INP*" ; @@ -397,6 +397,24 @@ LOCATE COMP "DAC_OUT_CS_6" SITE "L28"; DEFINE PORT GROUP "OUT_group" "DAC_OUT*" ; IOBUF GROUP "OUT_group" IO_TYPE=LVDS25 DIFFRESISTOR=OFF; +LOCATE COMP "TEST_SIG_OUT_0" SITE "J3"; #was "DQUL2_4_P" 70 +LOCATE COMP "TEST_SIG_OUT_1" SITE "K2"; #was "DQUL1_1_P" 77 +LOCATE COMP "TEST_SIG_OUT_2" SITE "K7"; #was "DQUL1_4_P" 93 +LOCATE COMP "TEST_SIG_OUT_3" SITE "M8"; #was "DQUL1_3_P" 89 +LOCATE COMP "TEST_SIG_OUT_4" SITE "AJ5"; #was "KEL8_P" +LOCATE COMP "TEST_SIG_OUT_5" SITE "AD9"; #was "KEL11_P" +LOCATE COMP "TEST_SIG_OUT_6" SITE "AL30"; #was "KEL28_P" +LOCATE COMP "TEST_SIG_OUT_7" SITE "AH33"; #was "KEL31_P" +DEFINE PORT GROUP "TEST_SIG_group" "TEST_SIG*" ; +IOBUF GROUP "TEST_SIG_group" IO_TYPE=LVDS25 ; + + +LOCATE COMP "FEETEMP_0" SITE "P5"; #was "DQUL3_3_P" 65 +LOCATE COMP "FEETEMP_1" SITE "P4"; #was "DQUL3_3_N" 66 +LOCATE COMP "FEETEMP_2" SITE "AM6"; #was "KEL6_P" +LOCATE COMP "FEETEMP_3" SITE "AM29"; #was "KEL26_P" +DEFINE PORT GROUP "FEETEMP_group" "FEETEMP*" ; +IOBUF GROUP "FEETEMP_group" IO_TYPE=LVCMOS25 PULLMODE=UP DRIVE=8 ; ################################################################# # Many LED @@ -511,8 +529,8 @@ LOCATE COMP "SPARE_IN_0" SITE "K31"; LOCATE COMP "SPARE_IN_1" SITE "R4"; #LOCATE COMP "SPARE_IN0_N" SITE "K32"; #LOCATE COMP "SPARE_IN1_N" SITE "R3"; +IOBUF PORT "SPARE_IN_0" IO_TYPE=LVDS25 DIFFRESISTOR=100 ; IOBUF PORT "SPARE_IN_1" IO_TYPE=LVDS25 DIFFRESISTOR=100 ; -IOBUF PORT "SPARE_IN_2" IO_TYPE=LVDS25 DIFFRESISTOR=100 ; diff --git a/pinout/trb3sc_master.lpf b/pinout/trb3sc_master.lpf index 0fa73e1..6276efe 100644 --- a/pinout/trb3sc_master.lpf +++ b/pinout/trb3sc_master.lpf @@ -83,8 +83,64 @@ IOBUF GROUP "BACK_3V3_group" IO_TYPE=LVTTL33 PULLMODE=DOWN; ################################################################# # AddOn Connector ################################################################# +#on KEL1 +LOCATE COMP "INP_64" SITE "AP5"; +LOCATE COMP "INP_65" SITE "AP2"; +LOCATE COMP "INP_66" SITE "AN1"; +LOCATE COMP "INP_67" SITE "AN3"; +LOCATE COMP "INP_68" SITE "AL5"; +LOCATE COMP "INP_69" SITE "AM6"; +LOCATE COMP "INP_70" SITE "AL4"; +LOCATE COMP "INP_71" SITE "AJ5"; +LOCATE COMP "INP_72" SITE "AJ2"; +LOCATE COMP "INP_73" SITE "AL3"; +LOCATE COMP "INP_74" SITE "AD9"; +LOCATE COMP "INP_75" SITE "AJ4"; +LOCATE COMP "INP_76" SITE "V4"; +LOCATE COMP "INP_77" SITE "V5"; +LOCATE COMP "INP_78" SITE "T9"; +LOCATE COMP "INP_79" SITE "T2"; + #on KEL2 +LOCATE COMP "INP_80" SITE "AP29"; +LOCATE COMP "INP_81" SITE "AP33"; +LOCATE COMP "INP_82" SITE "AN34"; +LOCATE COMP "INP_83" SITE "AP31"; +LOCATE COMP "INP_84" SITE "AN32"; +LOCATE COMP "INP_85" SITE "AM29"; +LOCATE COMP "INP_86" SITE "AL31"; +LOCATE COMP "INP_87" SITE "AL30"; +LOCATE COMP "INP_88" SITE "AL34"; +LOCATE COMP "INP_89" SITE "AJ31"; +LOCATE COMP "INP_90" SITE "AH33"; +LOCATE COMP "INP_91" SITE "AL32"; +LOCATE COMP "INP_92" SITE "AF32"; +LOCATE COMP "INP_93" SITE "AE32"; +LOCATE COMP "INP_94" SITE "AE30"; +LOCATE COMP "INP_95" SITE "AD26"; + +DEFINE PORT GROUP "INP_group" "INP*" ; +IOBUF GROUP "INP_group" IO_TYPE=LVDS25 DIFFRESISTOR=100; +################################################################# +# SPI +################################################################# +LOCATE COMP "DAC_IN_SDI_5" SITE "P7"; +LOCATE COMP "DAC_IN_SDI_6" SITE "M29"; + +DEFINE PORT GROUP "IN_group" "DAC_IN*" ; +IOBUF GROUP "IN_group" IO_TYPE=LVDS25 DIFFRESISTOR=100; + +LOCATE COMP "DAC_OUT_SDO_5" SITE "R8"; +LOCATE COMP "DAC_OUT_SCK_5" SITE "R2"; +LOCATE COMP "DAC_OUT_CS_5" SITE "P9"; +LOCATE COMP "DAC_OUT_SDO_6" SITE "AC28"; +LOCATE COMP "DAC_OUT_SCK_6" SITE "M34"; +LOCATE COMP "DAC_OUT_CS_6" SITE "L28"; + +DEFINE PORT GROUP "OUT_group" "DAC_OUT*" ; +IOBUF GROUP "OUT_group" IO_TYPE=LVDS25 DIFFRESISTOR=OFF; + ################################################################# # Pin-header IO ################################################################# @@ -260,4 +316,4 @@ LOCATE COMP "TEST_LINE_13" SITE "D20"; LOCATE COMP "TEST_LINE_14" SITE "F21"; LOCATE COMP "TEST_LINE_15" SITE "F22"; DEFINE PORT GROUP "TEST_LINE_group" "TEST_LINE*" ; -IOBUF GROUP "TEST_LINE_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN DRIVE=8; \ No newline at end of file +IOBUF GROUP "TEST_LINE_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN DRIVE=8;