From: Jan Michel Date: Mon, 3 Feb 2014 09:28:03 +0000 (+0100) Subject: first half of report X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=988fe2301879bb578cf4d53b98d208a357f79248;p=reports.git first half of report --- diff --git a/GSI_2014_JM-MW_MVD-Electroncis/.gitignore b/GSI_2014_JM-MW_MVD-Electroncis/.gitignore new file mode 100644 index 0000000..10bc462 --- /dev/null +++ b/GSI_2014_JM-MW_MVD-Electroncis/.gitignore @@ -0,0 +1,2 @@ +*.kate-swp +*.backup diff --git a/GSI_2014_JM-MW_MVD-Electroncis/mvdelectronics.tex b/GSI_2014_JM-MW_MVD-Electroncis/mvdelectronics.tex index d7fc22b..e50cb32 100644 --- a/GSI_2014_JM-MW_MVD-Electroncis/mvdelectronics.tex +++ b/GSI_2014_JM-MW_MVD-Electroncis/mvdelectronics.tex @@ -17,8 +17,48 @@ BMBF}} \affil[1]{Goethe-Universität Frankfurt} \maketitle +The on-going development of the support electronics of the CBM Micro-Vertex-Detector (MVD) was +focused on two major aspects: First, the integration in a new DAQ system (based on the TRB3 system +developed by HADES) and, second, the design of an integrated control and monitoring interface for +systems consisting of several sensors. +\section{New Electronics} +The major goal of front-end electronics development was to migrate the read-out to a new, more +powerful read-out platform, TRB3. Even though the central parts of software and FPGA designs need +not to be changed, the read-out chain between digital electronics and sensors was redesigned to +gain better performance and additional monitoring features. Here, also the principal structure of +the chain was simplified by dropping the separated connection for control signals and merging all +supply and data lines for a sensor on one common cable. +Special care was taken for the most sensitive supply voltage, a biasing voltage for the pixel +matrices of the sensors. Here, several generation and distribution schemes are foreseen to +investigate which setup results in the best noise performance. Furthermore, all relevant voltages +and currents can be monitored remotely to further study the behavior of sensors and, subsequently, +to design a matching powering scheme for the final detector setup. + +In the current connection scheme, the new FPGA platform can support up to 16 sensors in parallel. +Note that this value is mostly limited by the number I/O connections for the huge number of control +and monitoring signals in the current design version and is likely to increase in future +iterations. The resources of the FPGA also allow for further data sparsification algorithms like +cluster detection as described in~\cite{cluster}. + +\begin{figure}[ht] +\centering +\includegraphics*[width=70mm]{platine_bestueckt.jpeg} +\caption{The new Converter Board with power supply, control and monitoring for two sensors.} +\label{cb} +\end{figure} + +\section{New Control Interface} + + +\begin{thebibliography}{9} + +\bibitem{cluster} +Qiyan Li, FPGA-based Cluster Finding, this issue. + + +\end{thebibliography} \end{document} diff --git a/GSI_2014_JM-MW_MVD-Electroncis/platine_bestueckt.jpeg b/GSI_2014_JM-MW_MVD-Electroncis/platine_bestueckt.jpeg new file mode 100644 index 0000000..0e71d44 Binary files /dev/null and b/GSI_2014_JM-MW_MVD-Electroncis/platine_bestueckt.jpeg differ