From: Jan Michel Date: Sat, 6 Apr 2019 15:49:29 +0000 (+0200) Subject: add ecp5 ROM encoder generation file X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=9a1a1b77b9fa96cfa791902255257800bafdd1f5;p=tdc.git add ecp5 ROM encoder generation file --- diff --git a/releases/tdc_v2.3/rom_encoder/ecp5/ROM_encoder_4/ROM_encoder_4.sbx b/releases/tdc_v2.3/rom_encoder/ecp5/ROM_encoder_4/ROM_encoder_4.sbx new file mode 100644 index 0000000..fe6d019 --- /dev/null +++ b/releases/tdc_v2.3/rom_encoder/ecp5/ROM_encoder_4/ROM_encoder_4.sbx @@ -0,0 +1,249 @@ + + + + Lattice Semiconductor Corporation + LEGACY + ROM + 5.4 + + + Diamond_Simulation + simulation + + ./ROM_encoder_4.vhd + vhdlSource + + + + Diamond_Synthesis + synthesis + + ./ROM_encoder_4.vhd + vhdlSource + + + + + + Configuration + none + ${sbp_path}/generate_core.tcl + CONFIG + + + + + + + + LFE5UM-85F-8BG381C + synplify + 2016-09-25.09:08:28 PM + 2017-04-09.10:09:37 PM + 3.8.0.115.3 + VHDL + + false + false + false + false + false + false + false + false + false + false + LPM + PRIMARY + PRIMARY + false + false + + + + + + Family + ecp5um + + + OperatingCondition + COM + + + Package + CABGA381 + + + PartName + LFE5UM-85F-8BG381C + + + PartType + LFE5UM-85F + + + SpeedGrade + 8 + + + Status + P + + + + CoreName + ROM + + + CoreRevision + 5.4 + + + CoreStatus + Demo + + + CoreType + LPM + + + Date + 04/09/2017 + + + ModuleName + ROM_encoder_4 + + + ParameterFileVersion + 1.0 + + + SourceFormat + vhdl + + + Time + 22:09:36 + + + VendorName + Lattice Semiconductor Corporation + + + + Address + 1024 + + + ByteSize + 9 + + + ClockEn + 0 + + + Data + 8 + + + Destination + Synplicity + + + EDIF + 1 + + + EnECC + 0 + + + Expression + BusA(0 to 7) + + + IO + 0 + + + Init + 0 + + + MemFile + /home/cugur/Projects/TDC_on_TRB3/tdc/releases/tdc_v2.3/rom_encoder/rom_encoder_dirich.mem + + + MemFormat + orca + + + Optimization + Speed + + + Order + Big Endian [MSB:LSB] + + + OutputEn + 1 + + + Pipeline + 0 + + + Reset + Sync + + + Reset1 + Sync + + + VHDL + 1 + + + Verilog + 0 + + + Write + Normal + + + enByte + 0 + + + init_data + 0 + + + + /home/cugur/Projects/TDC_on_TRB3/tdc/releases/tdc_v2.3/rom_encoder/rom_encoder_dirich.mem + mem + + + + cmd_line + -w -n ROM_encoder_4 -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type romblk -device LFE5UM-85F -addr_width 10 -data_width 8 -num_words 1024 -outdata REGISTERED -cascade -1 -resetmode SYNC -sync_reset -memfile "/home/cugur/Projects/TDC_on_TRB3/tdc/releases/tdc_v2.3/rom_encoder/rom_encoder_dirich.mem" -memformat orca + + + + + + + LATTICE + LOCAL + ROM_encoder_4 + 1.0 + + + +