From: Michael Wiebusch Date: Thu, 28 Nov 2013 19:10:24 +0000 (+0100) Subject: added Front-End Electronics 2013 overview scheme X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=9a66bcf2086b4ba897347428a3dc4a8d79ae48dc;p=mvd_docu.git added Front-End Electronics 2013 overview scheme --- diff --git a/electronics/overview.pdf b/electronics/overview.pdf new file mode 100644 index 0000000..6ed427f Binary files /dev/null and b/electronics/overview.pdf differ diff --git a/electronics/overview.svg b/electronics/overview.svg new file mode 100644 index 0000000..8ad7996 --- /dev/null +++ b/electronics/overview.svg @@ -0,0 +1,4820 @@ + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + DisA0 + EnaA0 + DisD0 + EnaD0 + + + + + SensorEn0 + SensorEn1 + + + + + + + + + + + + + + + JtagEn0 + SensorEn0 + + + JtagEn0 + + + JtagEn1 + + + + + JtagEn0 + + + + + + + + + SensorEn1 + + + + + + + + JtagEn1 + + + + + + + + MuxAddr + + + + + SPI 1 + + + + USART3 (SPI) + + + OvC thresh A + OvC thresh D + + + + DisA1 + EnaA1 + DisD1 + EnaD1 + + + + + + MuxAddr + + + + + SPI 3 + + + + + + + OvC thresh D + OvC thresh A + + + + + + + + + + + + + + + + + + + SPI 2 + USART 1 + + + + + + + + + (all violet signals) + + + + + CB Controller + JTAG Controller + Readout Controller + + + + + + + + + + + + + + Front-End Board + Converter Board + TRB3 + + + connection legend + TTL + analog + LVDS + power + + + + + µC control (TTL) + + bus + + + + + + VClpplayground + + + + powerfilters + + + + + analog PWRchip 0 + + + + digital PWRchip 0 + + TDI + TDO + TMS + TCK + + + LVDS<>TTL + + RESET + START + + + + + + + + + + + + + + + x-bar + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + TDI0 + TDO0 + TDI1 + TDO1 + RESET0 + START0 + TMS0 + TCK0 + + + + + + + + + + + RESET1 + START1 + RESET + START + TDI + TDO + + + + + + + + + + + TMS1 + TCK1 + + + + mux + + + + + + ADC + + + + LVDS<>TTL + + overcurrent A + overcurrent D + CLOCK + CLOCK + CLOCK0 + CLOCK1 + + + DAC + + + + analog PWRchip 1 + + + + digital PWRchip 1 + + + + + mux + + + + + + ADC + + + + LVDS<>TTL + + overcurrent A + overcurrent D + + + LVDSbuffers + + + D0 + D1 + MKD + CLKD + + VClp + VDISCRIREF + Temp Diode + + GNDA + VDDA + GND + VDD + + VClp + VDISCRIREF + Temp Diode + + GNDA + VDDA + GND + VDD + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + µC + + + + + + + + + + MIMOSA 26 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GNDA + VDDA + GND + VDD + + CLKL + RESET + START + (POWER) + TDI + TDO + TMS + TCK + VClp + VDISCRIREF + Temp Diode + (DATA) + (JTAG + CTRL) + (ANALOG) + + D0 + D1 + MKD + CLKD + + (CLOCK) + + GNDA + VDDA + GND + VDD + + CLKL + RESET + START + (POWER) + TDI + TDO + TMS + TCK + VClp + VDISCRIREF + Temp Diode + (DATA) + (JTAG + CTRL) + (ANALOG) + + D0 + D1 + MKD + CLKD + + (CLOCK) + + + + VClpplayground + + + + powerfilters + + + SPI + UART + + + LVDS<>TTL + + + + + + + + D0 + D1 + MKD + CLKD + + + + + + + + D0 + D1 + MKD + CLKD + + + + LVDSbuffers + + + D0 + D1 + MKD + CLKD + + OvCurA0 + OvCurD0 + OvCurA1 + OvCurD1 + MIMOSA 26 + + + + + + + + + + + + + + + + + + + + +