From: hadeshyp Date: Wed, 1 Apr 2009 15:04:06 +0000 (+0000) Subject: *** empty log message *** X-Git-Tag: oldGBE~467 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=9e2efbd5bf43bd6cf63f5ffdfa88ba414a63a8b1;p=trbnet.git *** empty log message *** --- diff --git a/special/adc_ltc2308_readout.vhd b/special/adc_ltc2308_readout.vhd index 38e70e1..82b7867 100644 --- a/special/adc_ltc2308_readout.vhd +++ b/special/adc_ltc2308_readout.vhd @@ -17,13 +17,14 @@ use work.trb_net_std.all; entity adc_ltc2308_readout is generic( CLOCK_FREQUENCY : integer := 100; --MHz - PRESET_RANGES : range_ram_t := (x"FFF_000", x"B50_C10", x"480_4E0", x"510_6A0", - -- -3 3 1.2 1.4 - -- ??? 2.9-3.1 1.15-1.25 1.3-1.7 - x"C80_D48", x"D48_ED8", x"A28_960", x"A28_960") - -- 3.3 3.5 5V/2 5V/2 - -- 3.2-3.4 3.4-3.8 2.4-2.6 2.4-2.6 - + PRESET_RANGES_CH0 : std_logic_vector(23 downto 0) := x"A28_960" ; --5V/2 - 2.4-2.6 + PRESET_RANGES_CH1 : std_logic_vector(23 downto 0) := x"A28_960" ; --5V/2 - 2.4-2.6 + PRESET_RANGES_CH2 : std_logic_vector(23 downto 0) := x"D48_ED8" ; --3.5 - 3.4-3.8 + PRESET_RANGES_CH3 : std_logic_vector(23 downto 0) := x"C80_D48" ; --3.3 - 3.2-3.4 + PRESET_RANGES_CH4 : std_logic_vector(23 downto 0) := x"510_6A0" ; --1.4 - 1.3-1.7 + PRESET_RANGES_CH5 : std_logic_vector(23 downto 0) := x"480_4E0" ; --1.2 - 1.15-1.25 + PRESET_RANGES_CH6 : std_logic_vector(23 downto 0) := x"B50_C10" ; --3.0 - 2.9-3.1 + PRESET_RANGES_CH7 : std_logic_vector(23 downto 0) := x"FFF_000" ---3.0 - ???-??? ); port( CLK : in std_logic; @@ -128,7 +129,9 @@ architecture adc_readout_arch of adc_ltc2308_readout is signal value_ram_addr : std_logic_vector(2 downto 0); signal last_DAT_READ_EN_IN : std_logic; - signal range_ram : range_ram_t := PRESET_RANGES; + type range_ram_t is array(7 downto 0) of std_logic_vector(23 downto 0); + signal range_ram : range_ram_t ;--:= (PRESET_RANGES_CH7,PRESET_RANGES_CH6,PRESET_RANGES_CH5,PRESET_RANGES_CH4, + -- PRESET_RANGES_CH3,PRESET_RANGES_CH2,PRESET_RANGES_CH1,PRESET_RANGES_CH0); signal first_sequence_after_stop : std_logic; begin @@ -163,7 +166,6 @@ begin value_ram_addr <= range_ram_addr; - THE_RANGE_RAM : process(CLK) begin if rising_edge(CLK) then diff --git a/trb_net16_ibuf.vhd b/trb_net16_ibuf.vhd index bdcfcdd..dba434a 100644 --- a/trb_net16_ibuf.vhd +++ b/trb_net16_ibuf.vhd @@ -432,7 +432,7 @@ counter_match <= '1'; fifo_read <= not fifo_empty and not (fifo_read_before and not ((sbuf_init_free and not current_fifo_packet_type(3)) or (sbuf_reply_free and current_fifo_packet_type(3)) - or throw_away)); + )); if (fifo_read_before = '1' and (current_fifo_packet_type(2 downto 0) /= TYPE_EOB)) then diff --git a/trb_net16_ipudata.vhd b/trb_net16_ipudata.vhd index 5bb44e4..3197aad 100644 --- a/trb_net16_ipudata.vhd +++ b/trb_net16_ipudata.vhd @@ -78,13 +78,12 @@ architecture trb_net16_ipudata_arch of trb_net16_ipudata is signal state_bits : std_logic_vector(2 downto 0); signal dhdr_counter : std_logic_vector(1 downto 0); signal first_ipu_read : std_logic; - signal ipu_read_before : std_logic; + begin IPU_NUMBER_OUT <= buf_NUMBER; IPU_START_READOUT_OUT <= buf_START_READOUT; - IPU_READ_OUT <= buf_IPU_READ; IPU_INFORMATION_OUT <= buf_INFORMATION; PROC_STATE_MACHINE : process(CLK) @@ -97,9 +96,11 @@ begin update_buffers <= '0'; waiting_word <= '0'; buf_API_DATAREADY_OUT <= '0'; + buf_IPU_READ <= '0'; first_ipu_read <= '0'; else buf_API_READ_OUT <= '1'; + buf_API_DATAREADY_OUT <= '0'; first_ipu_read <= '0'; case state is when START => @@ -150,23 +151,12 @@ begin end if; when READING => - buf_API_DATAREADY_OUT <= IPU_DATAREADY_IN or waiting_word or ipu_read_before; - if API_READ_IN = '1' then - ipu_read_before <= '0'; - end if; - if buf_API_DATAREADY_OUT = '1' and API_READ_IN = '1' then - waiting_word <= '0'; - end if; - if IPU_DATAREADY_IN = '1' and waiting_word = '0' and buf_IPU_READ = '1' then - buf_API_DATA_OUT <= IPU_DATA_IN(31 downto 16); - waiting_word <= '1'; - ipu_read_before <= '1'; - elsif ipu_read_before = '1' and API_READ_IN = '0' then - buf_API_DATA_OUT <= reg_IPU_DATA_high; - else - buf_API_DATA_OUT <= reg_IPU_DATA; - end if; - if saved_IPU_READOUT_FINISHED_IN = '1' and waiting_word = '0' and IPU_DATAREADY_IN = '0' then + + + + --end of readout + if saved_IPU_READOUT_FINISHED_IN = '1' and select_word = '0' and buf_API_DATAREADY_OUT = '0' + and buf_IPU_READ = '1' and IPU_DATAREADY_IN = '0' then state <= START; end if; if saved_IPU_READOUT_FINISHED_IN = '1' or IPU_READOUT_FINISHED_IN = '1' then @@ -179,7 +169,7 @@ begin end if; end process; - buf_IPU_READ <= '1' when API_READ_IN = '1' and waiting_word = '0' and (state = READING or first_ipu_read = '1') else '0'; + PROC_buffer_inputs : process(CLK) @@ -236,13 +226,11 @@ begin API_ERROR_PATTERN_OUT <= buf_IPU_ERROR_PATTERN_IN; API_LENGTH_OUT <= buf_IPU_LENGTH_IN+2; API_READ_OUT <= buf_API_READ_OUT; - API_DATAREADY_OUT <= buf_API_DATAREADY_OUT; - API_DATA_OUT <= buf_API_DATA_OUT; API_PACKET_NUM_OUT <= packet_number; API_SEND_OUT <= buf_API_SEND_OUT; API_SHORT_TRANSFER_OUT<= '0'; API_DTYPE_OUT <= buf_TYPE; - + API_DATAREADY_OUT <= buf_API_DATAREADY_OUT; STAT_DEBUG <= (others => '0'); diff --git a/trb_net_std.vhd b/trb_net_std.vhd index 5e26c04..69066e2 100644 --- a/trb_net_std.vhd +++ b/trb_net_std.vhd @@ -8,7 +8,7 @@ package trb_net_std is type channel_config_t is array(0 to 3) of integer; type array_32_t is array(integer range <>) of std_logic_vector(31 downto 0); - type range_ram_t is array(7 downto 0) of std_logic_vector(23 downto 0); + -- some basic definitions for the whole network -----------------------------------------------