From: Jan Michel <j.michel@gsi.de>
Date: Wed, 10 Jun 2020 08:43:07 +0000 (+0200)
Subject: fix automatic test signal generation
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=a23681ecc280bde9bd551af3a5b4d9f436c9367b;p=trb3sc.git

fix automatic test signal generation
---

diff --git a/code/fee_signals.vhd b/code/fee_signals.vhd
index d62bfa6..14e2f29 100644
--- a/code/fee_signals.vhd
+++ b/code/fee_signals.vhd
@@ -130,9 +130,8 @@ PROC_TESTSIG : process begin
   wait until rising_edge(CLK);
   if start = '1' then
     timer <= unsigned(timer_reg);
-    TEST_SIG_OUT <= not invert_reg;
-  end if;
-  if timer > 0 then
+    TEST_SIG_OUT <= (invert_reg xor select_reg);
+  elsif timer > 0 then
     timer <= timer - 1 ;
   else
     TEST_SIG_OUT <= invert_reg;