From: Michael Boehmer Date: Sun, 5 Dec 2021 20:42:31 +0000 (+0100) Subject: debug pins unified X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=a5c89dd6ad909d691a11b67df114a961055bb7fe;p=trb3sc.git debug pins unified --- diff --git a/cts/trb3sc_cts.vhd b/cts/trb3sc_cts.vhd index 4440e8a..53755c8 100644 --- a/cts/trb3sc_cts.vhd +++ b/cts/trb3sc_cts.vhd @@ -238,6 +238,7 @@ architecture trb3sc_arch of trb3sc_cts is signal link_tx_ready_i : std_logic; signal tx_pcs_rst_i : std_logic; signal rst_qd_c_i : std_logic; + signal word_sync_i : std_logic; signal tx_reset_state : std_logic_vector(3 downto 0); @@ -325,8 +326,7 @@ gen_PCSB : if USE_BACKPLANE = c_NO and USE_ADDON = c_NO generate SYSCLK => clk_sys, RESET => reset_i, -- check CLEAR => reset_i, -- check - - + -- Media Interface TX/RX MEDIA_MED2INT(0) => open, MEDIA_MED2INT(1) => open, @@ -350,7 +350,7 @@ gen_PCSB : if USE_BACKPLANE = c_NO and USE_ADDON = c_NO generate TX_RST_WORD_IN => x"00", -- sync operation WORD_SYNC_IN => '1', -- CTS MASTER - WORD_SYNC_OUT => open, + WORD_SYNC_OUT => word_sync_i, --open, MASTER_CLK_IN => clk_full_osc, -- CTS MASTER MASTER_CLK_OUT => open, GLOBAL_RESET_IN => '0', -- check @@ -416,18 +416,19 @@ gen_PCSB : if USE_BACKPLANE = c_NO and USE_ADDON = c_NO generate end process THE_SYNC_PROC; --HDR_IO(10 downto 1) <= (others => '0'); - HDR_IO(10) <= '0'; - HDR_IO(9) <= '0'; - HDR_IO(8) <= '0'; - HDR_IO(7) <= '0'; - HDR_IO(6) <= '0'; - HDR_IO(5) <= '0'; - HDR_IO(4) <= '0'; - HDR_IO(3) <= '0'; - HDR_IO(2) <= rx_dlm_i; - HDR_IO(1) <= tx_dlm_i; + HDR_IO(10) <= word_sync_i; + HDR_IO(9) <= '0'; + HDR_IO(8) <= tx_clk_avail_i; + HDR_IO(7) <= sync_tx_quad_i; + HDR_IO(6) <= tx_pcs_rst_i; + HDR_IO(5) <= '0'; + HDR_IO(4) <= '0'; + HDR_IO(3) <= '0'; + HDR_IO(2) <= rx_dlm_i; + HDR_IO(1) <= tx_dlm_i; - TEST_LINE <= debug_i(15 downto 0); + TEST_LINE(11 downto 0) <= debug_i(11 downto 0); + TEST_LINE(15 downto 12) <= tx_reset_state; destroy_link_i <= common_ctrl_reg(88); diff --git a/tdctemplate/trb3sc_tdctemplate.vhd b/tdctemplate/trb3sc_tdctemplate.vhd index f384c54..c5028a9 100644 --- a/tdctemplate/trb3sc_tdctemplate.vhd +++ b/tdctemplate/trb3sc_tdctemplate.vhd @@ -307,36 +307,20 @@ end generate; SFP_TX_DIS(0) <= '0' when USE_GBE = 1 else '1'; --HDR_IO(10 downto 1) <= (others => '0'); - HDR_IO(10) <= tx_reset_state(3); - HDR_IO(9) <= tx_reset_state(2); - HDR_IO(8) <= tx_reset_state(1); - HDR_IO(7) <= tx_reset_state(0); - HDR_IO(6) <= '0'; - HDR_IO(5) <= '0'; - HDR_IO(4) <= '0'; - HDR_IO(3) <= '0'; - HDR_IO(2) <= rx_dlm_i; - HDR_IO(1) <= '0'; - - TEST_LINE <= debug_i(15 downto 0); + HDR_IO(10) <= word_sync_i; + HDR_IO(9) <= master_reset_i; + HDR_IO(8) <= tx_clk_avail_i; + HDR_IO(7) <= sync_tx_quad_i; + HDR_IO(6) <= tx_pcs_rst_i; + HDR_IO(5) <= '0'; + HDR_IO(4) <= '0'; + HDR_IO(3) <= '0'; + HDR_IO(2) <= rx_dlm_i; + HDR_IO(1) <= '0'; + + TEST_LINE(11 downto 0) <= debug_i(11 downto 0); + TEST_LINE(15 downto 12) <= tx_reset_state; --- TEST_LINE(0) <= tx_pll_lol_qd_b_i; --- TEST_LINE(1) <= '0'; --- TEST_LINE(2) <= '0'; --- TEST_LINE(3) <= sync_tx_quad_i; --- TEST_LINE(4) <= '0'; --- TEST_LINE(5) <= debug_i(4); -- rx_los --- TEST_LINE(6) <= debug_i(3); -- rx_cdr_lol --- TEST_LINE(7) <= debug_i(0); -- link_rx_ready --- TEST_LINE(8) <= debug_i(1); -- link_half_done --- TEST_LINE(9) <= debug_i(2); -- link_full_done --- TEST_LINE(10) <= '0'; --- TEST_LINE(11) <= debug_i(5); -- SFP_LOS_IN --- TEST_LINE(12) <= '0'; --- TEST_LINE(13) <= '0'; --- TEST_LINE(14) <= '0'; --- TEST_LINE(15) <= '0'; - --------------------------------------------------------------------------- -- Endpoint ---------------------------------------------------------------------------