From: Andreas Neiser <neiser@kph.uni-mainz.de>
Date: Wed, 27 May 2015 16:05:52 +0000 (+0200)
Subject: Registering debug signals, fixes strange synplify errors. This version at least compiles.
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=aed08c7570545b5125809efd7117b9d47e856d4f;p=trb3.git

Registering debug signals, fixes strange synplify errors. This version at least compiles.
---

diff --git a/ADC/source/adc_processor_cfd_ch.vhd b/ADC/source/adc_processor_cfd_ch.vhd
index 82980b0..13cd179 100644
--- a/ADC/source/adc_processor_cfd_ch.vhd
+++ b/ADC/source/adc_processor_cfd_ch.vhd
@@ -103,10 +103,10 @@ begin
   input <= unsigned(ADC_DATA);
 
   -- Tell the outer word some useful debug infos
-  DEBUG.InvalidWordCount <= invalid_word_count;
+  DEBUG.InvalidWordCount <= invalid_word_count when rising_edge(CLK);
   DEBUG.Baseline         <= baseline;
   DEBUG.LastWord         <= input;
-  DEBUG.EpochCounter     <= epoch_counter;
+  DEBUG.EpochCounter     <= epoch_counter when rising_edge(CLK);
 
   -- word checker, needed for ADC phase adjustment
   gen_word_checker : for i in 0 to CHANNELS - 1 generate