From: hadeshyp <hadeshyp>
Date: Wed, 28 Apr 2010 13:00:23 +0000 (+0000)
Subject: *** empty log message ***
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=b300b73f59f208e7f807399dc64346ed6008aec5;p=daqdocu.git

*** empty log message ***
---

diff --git a/daqnet.kilepr b/daqnet.kilepr
index c27578d..ce055bf 100755
--- a/daqnet.kilepr
+++ b/daqnet.kilepr
@@ -3,7 +3,7 @@ img_extIsRegExp=false
 img_extensions=.eps .jpg .jpeg .png .pdf .ps .fig .gif
 kileprversion=2
 kileversion=2.0
-lastDocument=showerdata.tex
+lastDocument=gbe.tex
 masterDocument=main.tex
 name=trbnet
 pkg_extIsRegExp=false
@@ -35,37 +35,37 @@ order=8
 
 [item:endpoint.tex]
 archive=true
-column=222
+column=0
 encoding=ISO 8859-15
 highlight=LaTeX
-line=95
+line=88
 open=true
 order=11
 
 [item:gbe.tex]
 archive=true
-column=0
+column=2
 encoding=ISO 8859-15
 highlight=LaTeX
-line=0
+line=53
 open=true
 order=12
 
 [item:hubs.tex]
 archive=true
-column=28
+column=186
 encoding=
 highlight=LaTeX
-line=56
+line=46
 open=true
 order=6
 
 [item:ipudataformat.tex]
 archive=true
-column=92
+column=25
 encoding=UTF-8
 highlight=LaTeX
-line=44
+line=204
 open=true
 order=1
 
@@ -80,10 +80,10 @@ order=2
 
 [item:main.tex]
 archive=true
-column=0
+column=14
 encoding=UTF-8
 highlight=LaTeX
-line=138
+line=129
 open=true
 order=0
 
@@ -119,7 +119,7 @@ archive=true
 column=0
 encoding=UTF-8
 highlight=LaTeX
-line=67
+line=68
 open=true
 order=7
 
diff --git a/gbe.tex b/gbe.tex
index ff0e652..50f68d1 100644
--- a/gbe.tex
+++ b/gbe.tex
@@ -5,6 +5,26 @@ The configuration memory of the GbE interface consists of two parts. Registers 0
 
 The second part is located at addresses 0x8200 to 0x82F0. Each block of 16 addresses describes the addresses and ports used to send data to one of the Eventbuilders (see table \ref{GbEEBSettings}. Which entry in the memory is used, is selected by the lower 4 bits of the IPU readout information as shown in table \ref{IPUInformationBits}.
 
+The GbE interface itself has a control and a status register, available at addresses 0xc020 and 0xc021 respectively:
+\begin{description}
+ \item[0xc020: Control Register] PHY control register. Each of the bits has to be reset manually after use
+  \begin{description}
+   \item[Bit 0]Restart Autonegotiation
+   \item[Bit 1]PHY mode (must be 0)
+   \item[Bit 3]PHY reset
+  \end{description}
+ \item[0xc021: Status Register] GbE link status register (detailed explanation: t.b.d.)
+  \begin{description}
+   \item[Bit 15..0] Link partner page
+   \item[Bit 16] Link partner page received (strobe signal)
+   \item[Bit 17] Autonegotiation completed
+   \item[Bit 23..20] Reset state machine status
+   \item[Bit 27..24] Link status
+  \end{description}
+\end{description}
+
+ 
+
 \begin{table}[hbtp]
 \begin{center}
 \begin{tabularx}{\textwidth}{|l|l|X|}
@@ -48,4 +68,4 @@ The second part is located at addresses 0x8200 to 0x82F0. Each block of 16 addre
 \caption{Memory map for GbE Ethernet settings. The third digit is the EventBuilder number, allowing to stor 16 different settings that are selected by the IPU request information word.}
 \label{GbEEBSettings}
 \end{center}
-\end{table}
+\end{table}
\ No newline at end of file
diff --git a/lvl1trigger.tex b/lvl1trigger.tex
index a42c5f2..36887a0 100755
--- a/lvl1trigger.tex
+++ b/lvl1trigger.tex
@@ -61,7 +61,8 @@ In case a board has not been configured correctly to deliver proper data, this i
 20 & buffers half full & The event data buffers are filled halfway.  Set by user. \\
 21 & buffers almost full full & The event data buffers are almost full. Set by user. \\
 22 & not configured & Frontend is not configured correctly to handle triggers, an initilization is needed. Set by user. \\
-23 - 31 & t.b.d. & Not yet defined \\
+23 & frontend error & Parts of the connected frontend are not behaving correctly: no response, not synchronized, token missing...\\
+24 - 31 & t.b.d. & Not yet defined \\
 \end{tabularx}
 \caption{Error- and Status information contained in the network termination packet}
 \label{LVL1Errorbits}
diff --git a/mdc.tex b/mdc.tex
index a88670f..8a40526 100755
--- a/mdc.tex
+++ b/mdc.tex
@@ -73,4 +73,16 @@ The ADC monitoring most voltages on each OEP can be accessed using register addr
 \caption{ADC Channels for MDC OEP voltage monitoring. -3.0V are reported to be +3.0V by ADC. Both 5V channels are connected using a voltage divider, thus reading 2.5V at nominal voltage.}
 \label{MDCOEPADCChannels}
 \end{center}
-\end{table}
\ No newline at end of file
+\end{table}
+
+\subsubsection{MDC OEP Status Register}
+% TDC Readout Status
+%   DEBUG_REGISTER_OUT(3 downto 0)   <= state_bits;
+%   DEBUG_REGISTER_OUT(4)            <= reg_data_valid_out;
+%   DEBUG_REGISTER_OUT(5)            <= TOKEN_IN;
+%   DEBUG_REGISTER_OUT(6)            <= A_DST_IN;
+%   DEBUG_REGISTER_OUT(7)            <= A_AOD_IN;
+%   DEBUG_REGISTER_OUT(8)            <= A_RESERV_IN;
+%   DEBUG_REGISTER_OUT(12 downto 9)  <= FLAG_EVENT_COUNTER_IN;
+%   DEBUG_REGISTER_OUT(31 downto 13) <= (others => '0');
+%