From: Jan Michel Date: Mon, 10 Aug 2015 15:24:37 +0000 (+0200) Subject: fixing errors in record based files X-Git-Tag: v2.3~72 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=b5c99f78303be19dc03a5ae297bdb70dada7bfc6;p=tdc.git fixing errors in record based files --- diff --git a/releases/tdc_v2.1.6/BusHandler_record.vhd b/releases/tdc_v2.1.6/BusHandler_record.vhd index 902c171..ffcfb09 100644 --- a/releases/tdc_v2.1.6/BusHandler_record.vhd +++ b/releases/tdc_v2.1.6/BusHandler_record.vhd @@ -34,27 +34,27 @@ begin rx_write <= BUS_RX.write when rising_edge(CLK); rx_addr <= BUS_RX.addr(6 downto 0) when rising_edge(CLK); - READ_WRITE_RESPONSE : process (CLK, RESET) + READ_WRITE_RESPONSE : process (CLK) begin if rising_edge(CLK) then - if RESET = '1' then - BUS_TX.data <= (others => '0'); - BUS_TX.ack <= '0'; - BUS_TX.unknown <= '0'; - elsif to_integer(unsigned(rx_addr)) > BUS_LENGTH then -- if bigger than 64 - BUS_TX.data <= (others => '0'); - BUS_TX.ack <= '0'; - BUS_TX.unknown <= '1'; - elsif rx_read = '1' then - BUS_TX.data <= DATA_IN(to_integer(unsigned(rx_addr))); - BUS_TX.ack <= '1'; - BUS_TX.unknown <= '0'; + BUS_TX.ack <= '0'; + BUS_TX.unknown <= '0'; + BUS_TX.nack <= '0'; + + if rx_read = '1' then + if to_integer(unsigned(rx_addr)) > BUS_LENGTH then -- if bigger than 64 + BUS_TX.unknown <= '1'; + else + BUS_TX.data <= DATA_IN(to_integer(unsigned(rx_addr))); + BUS_TX.ack <= '1'; + end if; elsif rx_write = '1' then - DATA_OUT(to_integer(unsigned(rx_addr))) <= rx_data; - else - BUS_TX.data <= (others => '0'); - BUS_TX.ack <= '0'; - BUS_TX.unknown <= '0'; + if to_integer(unsigned(rx_addr)) > BUS_LENGTH then -- if bigger than 64 + BUS_TX.unknown <= '1'; + else + DATA_OUT(to_integer(unsigned(rx_addr))) <= rx_data; + BUS_TX.ack <= '1'; + end if; end if; end if; end process READ_WRITE_RESPONSE; diff --git a/releases/tdc_v2.1.6/TDC_record.vhd b/releases/tdc_v2.1.6/TDC_record.vhd index 11449c2..7645f34 100644 --- a/releases/tdc_v2.1.6/TDC_record.vhd +++ b/releases/tdc_v2.1.6/TDC_record.vhd @@ -224,7 +224,8 @@ begin BUS_RX(3) => busctrl_rx, -- contorl reg bus BUS_TX(0) => bushit_tx, BUS_TX(1) => busstat_tx, - BUS_TX(3) => buschdebug_tx, + BUS_TX(2) => buschdebug_tx, -- channel debug bus + BUS_TX(3) => busctrl_tx, STAT_DEBUG => open ); @@ -241,7 +242,7 @@ begin CLK => CLK_READOUT, BUS_RX => busctrl_rx, BUS_TX => busctrl_tx, - DATA_IN => (others => (others => '0')), + DATA_IN => ctrl_reg, DATA_OUT => ctrl_reg);