From: Jan Michel Date: Tue, 6 Sep 2022 08:50:37 +0000 (+0200) Subject: add new LED scheme to designs X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=bad5e7febd7a6844cc3851a51ad215f57855ec82;p=trb5sc.git add new LED scheme to designs --- diff --git a/gbe_standalone/trb5sc_gbe_template.vhd b/gbe_standalone/trb5sc_gbe_template.vhd index 4ca55d3..5b1be2d 100644 --- a/gbe_standalone/trb5sc_gbe_template.vhd +++ b/gbe_standalone/trb5sc_gbe_template.vhd @@ -86,6 +86,7 @@ architecture arch of trb5sc_template is signal GSR_N : std_logic; signal reset_i : std_logic; signal clear_i : std_logic; + signal external_clock_lock : std_logic := '0'; signal gsc_init_data : std_logic_vector(15 downto 0); signal gsc_reply_data : std_logic_vector(15 downto 0); @@ -116,7 +117,8 @@ architecture arch of trb5sc_template is signal timer : TIMERS; signal additional_reg : std_logic_vector(31 downto 0); - signal led_off : std_logic; + alias led_off : std_logic is add_reg(0); + signal spi_cs, spi_mosi, spi_miso, spi_clk : std_logic_vector(15 downto 0); signal sed_error_i : std_logic; @@ -380,8 +382,7 @@ begin DEBUG_OUT => open ); --- led_off <= additional_reg(0); - + -- FlashROM external connections FLASH_HOLD <= '1'; FLASH_WP <= '1'; @@ -434,6 +435,15 @@ begin LED_RJ_RED <= "11"; LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK; + + + LED_RJ_GREEN(1)<= not external_clock_lock or led_off; --on if external clock used + LED_RJ_GREEN(0)<= '0'; --on if SFP is used (next to SFP) + LED_RJ_RED(1) <= external_clock_lock or led_off; --on if internal clock used + LED_RJ_RED(0) <= '1'; --on if backplane is used (next to SFP) + LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK or led_off; --on if trigger/clock from RJ45 is used + + end architecture; diff --git a/mimosis/trb5sc_mimosis.vhd b/mimosis/trb5sc_mimosis.vhd index 748735e..ce47099 100644 --- a/mimosis/trb5sc_mimosis.vhd +++ b/mimosis/trb5sc_mimosis.vhd @@ -79,8 +79,8 @@ entity trb5sc_mimosis is LED_EXT_CLOCK : out std_logic; --Other Connectors - TEST : inout std_logic_vector(14 downto 1); - HDR_IO : inout std_logic_vector(15 downto 0) + TEST : inout std_logic_vector(14 downto 1); --on v1 only + HDR_IO : inout std_logic_vector(23 downto 0) --23..16 on v2 only ); @@ -107,8 +107,9 @@ architecture arch of trb5sc_mimosis is attribute syn_keep of GSR_N : signal is true; attribute syn_preserve of GSR_N : signal is true; - signal debug_clock_reset : std_logic_vector(31 downto 0); - signal debug_tools : std_logic_vector(31 downto 0); + signal debug_clock_reset : std_logic_vector(31 downto 0); + signal external_clock_lock : std_logic := '0'; + signal debug_tools : std_logic_vector(31 downto 0); --Media Interface signal med2int : med2int_array_t(0 to 0); @@ -135,6 +136,7 @@ architecture arch of trb5sc_mimosis is signal header_io_i : std_logic_vector(10 downto 1); signal timer : TIMERS; signal add_reg : std_logic_vector(31 downto 0); + alias led_off : std_logic is add_reg(0); signal out_data : std_logic_vector(15 downto 0); signal out_i : std_logic_vector( 7 downto 0); @@ -515,13 +517,16 @@ end process; LED_SFP_GREEN <= not med2int(0).stat_op(9); LED_SFP_RED <= not (med2int(0).stat_op(10) or med2int(0).stat_op(11)); LED_SFP_YELLOW <= not med2int(0).stat_op(8); - LED <= x"F0"; - LED_RJ_GREEN <= "00"; - LED_RJ_RED <= "11"; - LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK; + LED <= x"FF"; + LED_RJ_GREEN(1)<= not external_clock_lock or led_off; --on if external clock used + LED_RJ_GREEN(0)<= '1' when SERDES_NUM = 0 or led_off = '1' else '0'; --on if SFP is used (next to SFP) + LED_RJ_RED(1) <= external_clock_lock or led_off; --on if internal clock used + LED_RJ_RED(0) <= '1' when SERDES_NUM = 1 or led_off = '1' else '0'; --on if backplane is used (next to SFP) + LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK or led_off; --on if trigger/clock from RJ45 is used TEST(13 downto 1) <= (others => '0'); - TEST(14) <= flash_ncs_i; + TEST(14) <= flash_ncs_i; --for v1 boards + FLASH_NCS <= flash_ncs_i; diff --git a/template/trb5sc_template.vhd b/template/trb5sc_template.vhd index 4b0c911..8b3ad17 100644 --- a/template/trb5sc_template.vhd +++ b/template/trb5sc_template.vhd @@ -90,8 +90,9 @@ architecture arch of trb5sc_template is signal clear_i : std_logic; signal trigger_in_i : std_logic; - signal debug_clock_reset : std_logic_vector(31 downto 0); - signal debug_tools : std_logic_vector(31 downto 0); + signal debug_clock_reset : std_logic_vector(31 downto 0); + signal external_clock_lock : std_logic := '0'; + signal debug_tools : std_logic_vector(31 downto 0); --Media Interface signal med2int : med2int_array_t(0 to 0); @@ -396,10 +397,12 @@ THE_CAL_PLL : entity work.pll_in125_out50 LED_SFP_GREEN <= not med2int(0).stat_op(9) or led_off; LED_SFP_RED <= not (med2int(0).stat_op(10) or med2int(0).stat_op(11)) or led_off; LED_SFP_YELLOW <= not med2int(0).stat_op(8) or led_off; - LED <= x"F0"; - LED_RJ_GREEN <= "00"; - LED_RJ_RED <= "11"; - LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK or led_off; + LED <= x"FF"; + LED_RJ_GREEN(1)<= not external_clock_lock or led_off; --on if external clock used + LED_RJ_GREEN(0)<= '1' when SERDES_NUM = 0 or led_off = '1' else '0'; --on if SFP is used (next to SFP) + LED_RJ_RED(1) <= external_clock_lock or led_off; --on if internal clock used + LED_RJ_RED(0) <= '1' when SERDES_NUM = 1 or led_off = '1' else '0'; --on if backplane is used (next to SFP) + LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK or led_off; --on if trigger/clock from RJ45 is used ------------------------------------------------------------------------------- -- TDC