From: Ingo Froehlich <ingo@nomail.fake>
Date: Mon, 24 Jul 2017 16:24:34 +0000 (+0200)
Subject: fixed missing wait for ready when reading, IF
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=bfc10b8ac4ba77869ed494e2228e416152d07efc;p=vhdlbasics.git

fixed missing wait for ready when reading, IF
---

diff --git a/interface/spi_slave.vhd b/interface/spi_slave.vhd
index 9badbab..8db8c1a 100644
--- a/interface/spi_slave.vhd
+++ b/interface/spi_slave.vhd
@@ -114,10 +114,18 @@ PROC_GEN_SIGNALS : process begin
       state <= PREPARE_OUTPUT;
       
     when PREPARE_OUTPUT =>
-      if READY_IN = '1' then
-        output_data(15 downto 0) <= DATA_IN;
+      if operation_i = '0' then
+        if READY_IN = '1' then
+          output_data(15 downto 0) <= DATA_IN;
+          state <= WRITE_DATA;
+        end if;
+      else
+--        if READY_IN = '1' then
+--          output_data(15 downto 0) <= DATA_IN;
+--        end if;
+        output_data(15 downto 0) <= x"0000";
+        state <= WRITE_DATA;
       end if;
-      state <= WRITE_DATA;
       
     when WRITE_DATA =>
       if bitcnt = 31 then