From: Cahit Date: Wed, 23 Mar 2016 16:15:05 +0000 (+0100) Subject: updated top modules for trigger inputs X-Git-Tag: v2.3~46 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=c491d0a7d6d8f7beb80ea772759a7f1ef792eaf8;p=tdc.git updated top modules for trigger inputs --- diff --git a/releases/tdc_v2.1.6/trb3_periph_32PinAddOn.vhd b/releases/tdc_v2.1.6/trb3_periph_32PinAddOn.vhd index 255a911..a46c9cf 100644 --- a/releases/tdc_v2.1.6/trb3_periph_32PinAddOn.vhd +++ b/releases/tdc_v2.1.6/trb3_periph_32PinAddOn.vhd @@ -706,13 +706,13 @@ begin gen_TRIGGER_LOGIC : if INCLUDE_TRIGGER_LOGIC = 1 generate THE_TRIG_LOGIC : input_to_trigger_logic generic map( - INPUTS => PHYSICAL_INPUTS, - OUTPUTS => 4 + INPUTS => TRIG_GEN_INPUT_NUM, + OUTPUTS => TRIG_GEN_OUTPUT_NUM ) port map( CLK => clk_100_i, - INPUT => INP(PHYSICAL_INPUTS-1 downto 0), + INPUT => INP(TRIG_GEN_INPUT_NUM-1 downto 0), OUTPUT => trig_out, DATA_IN => trig_din, @@ -735,13 +735,13 @@ begin THE_STAT_LOGIC : entity work.input_statistics generic map( - INPUTS => PHYSICAL_INPUTS, + INPUTS => MONITOR_INPUT_NUM, SINGLE_FIFO_ONLY => USE_SINGLE_FIFO ) port map( CLK => clk_100_i, - INPUT => INP(PHYSICAL_INPUTS-1 downto 0), + INPUT => INP(MONITOR_INPUT_NUM-1 downto 0), DATA_IN => stat_din, DATA_OUT => stat_dout, diff --git a/releases/tdc_v2.2/trb3_periph_32PinAddOn.vhd b/releases/tdc_v2.2/trb3_periph_32PinAddOn.vhd index edd0412..f3fb044 100644 --- a/releases/tdc_v2.2/trb3_periph_32PinAddOn.vhd +++ b/releases/tdc_v2.2/trb3_periph_32PinAddOn.vhd @@ -589,13 +589,13 @@ begin gen_TRIGGER_LOGIC : if INCLUDE_TRIGGER_LOGIC = 1 generate THE_TRIG_LOGIC : input_to_trigger_logic generic map( - INPUTS => PHYSICAL_INPUTS, - OUTPUTS => 4 + INPUTS => TRIG_GEN_INPUT_NUM, + OUTPUTS => TRIG_GEN_OUTPUT_NUM ) port map( CLK => clk_100_i, - INPUT => INP(PHYSICAL_INPUTS-1 downto 0), + INPUT => INP(TRIG_GEN_INPUT_NUM-1 downto 0), OUTPUT => trig_out, DATA_IN => trig_din, @@ -618,13 +618,13 @@ begin THE_STAT_LOGIC : entity work.input_statistics generic map( - INPUTS => PHYSICAL_INPUTS, + INPUTS => MONITOR_INPUT_NUM, SINGLE_FIFO_ONLY => USE_SINGLE_FIFO ) port map( CLK => clk_100_i, - INPUT => INP(PHYSICAL_INPUTS-1 downto 0), + INPUT => INP(MONITOR_INPUT_NUM-1 downto 0), DATA_IN => stat_din, DATA_OUT => stat_dout, diff --git a/releases/tdc_v2.3/trb3_periph_32PinAddOn.vhd b/releases/tdc_v2.3/trb3_periph_32PinAddOn.vhd index e32398b..0d2ba52 100644 --- a/releases/tdc_v2.3/trb3_periph_32PinAddOn.vhd +++ b/releases/tdc_v2.3/trb3_periph_32PinAddOn.vhd @@ -326,9 +326,9 @@ begin DEBUG_TX_OUT => debug_tx, --Trigger & Monitor - MONITOR_INPUTS(19 downto 0) => INP(19 downto 0), - MONITOR_INPUTS(23 downto 20) => trig_gen_out_i, - TRIG_GEN_INPUTS => INP(15 downto 0), + MONITOR_INPUTS(31 downto 0) => INP(31 downto 0), + MONITOR_INPUTS(35 downto 32) => trig_gen_out_i, + TRIG_GEN_INPUTS => INP(31 downto 0), TRIG_GEN_OUTPUTS => trig_gen_out_i, LCD_OUT => lcd_out, --SED