From: Jan Michel <j.michel@gsi.de>
Date: Thu, 10 Sep 2020 08:28:32 +0000 (+0200)
Subject: Remove old file from master prj
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=c852a4c0e226399c8b8e1503134311e5dc8eba35;p=trb3sc.git

Remove old file from master prj
---

diff --git a/backplanemaster/config.vhd b/backplanemaster/config.vhd
index 2b0d7b5..859fc15 100644
--- a/backplanemaster/config.vhd
+++ b/backplanemaster/config.vhd
@@ -16,7 +16,9 @@ package config is
     constant USE_200MHZOSCILLATOR   : integer := c_YES;
     constant USE_EXTERNAL_CLOCK     : integer := c_YES; --'no' not implemented.
     constant CLOCK_FAST_SELECT      : integer := c_YES; --fast clock select (135us) or slow (280ms)?
-    
+
+    constant FPGA_TYPE               : integer  := 3;  --3: ECP3, 5: ECP5
+
 --Use sync mode, RX clock for all parts of the FPGA
     constant USE_RXCLOCK            : integer := c_NO;
    
diff --git a/backplanemaster/trb3sc_master.prj b/backplanemaster/trb3sc_master.prj
index 03522a9..81e1854 100644
--- a/backplanemaster/trb3sc_master.prj
+++ b/backplanemaster/trb3sc_master.prj
@@ -180,9 +180,8 @@ add_file -vhdl -lib work "../../trbnet/basics/ram_dp_rw.vhd"
 add_file -vhdl -lib work "../../trbnet/basics/pulse_stretch.vhd"
 
 #Hub
-add_file -vhdl -lib work "../../trbnet/trb_net16_api_ipu_streaming.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_hub_streaming_port.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_hub_streaming_port_sctrl_record.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_api_ipu_streaming_accel.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_hub_streaming_port_sctrl_accel.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_hub_base.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_hub_logic_2.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_hub_ipu_logic.vhd"