From: palka Date: Tue, 12 Feb 2008 14:11:11 +0000 (+0000) Subject: not X-Git-Tag: oldGBE~598 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=c963c953b247577a0edae51c8c0c09943bb3a7b0;p=trbnet.git not t final --- diff --git a/optical_link/hub.vhd b/optical_link/hub.vhd index ece2085..6d68de3 100644 --- a/optical_link/hub.vhd +++ b/optical_link/hub.vhd @@ -83,7 +83,7 @@ architecture hub of hub is hub_register_16 : in std_logic_vector(7 downto 0) ); end component; - component serdes_fpga_ref_clk--serdes + component serdes_fpga_ref_clk--serdes, flexi PCS port( -- refclkp : in std_logic; -- refclkn : in std_logic; @@ -333,6 +333,7 @@ architecture hub of hub is signal rxb_pclk_a : std_logic_vector((HOW_MANY_CHANNELS+3)/4 -1 downto 0); signal rx_clk_i : std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*4-1 downto 0); signal flexi_pcs_synch_status_i : std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0); + signal word_align_en : std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*4-1 downto 0); ----------------------------------------------------------------------------- -- hub trb interface ----------------------------------------------------------------------------- @@ -364,6 +365,8 @@ architecture hub of hub is -- flexi_PCS to hub interface ----------------------------------------------------------------------------- signal med_dataready_in_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); + --test + signal data_valid_in_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); signal med_dataready_out_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); signal med_read_in_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); signal med_read_out_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0); @@ -377,7 +380,7 @@ architecture hub of hub is ----------------------------------------------------------------------------- signal hub_register_0e_and_0d : std_logic_vector(15 downto 0); signal cv_counter : std_logic_vector(31 downto 0); - signal cv_countera : std_logic_vector(31 downto 0); + signal cv_countera : std_logic_vector(31 downto 0); signal serdes_ref_clk : std_logic; signal serdes_ref_lock : std_logic; signal serdes_ref_clks : std_logic; @@ -393,6 +396,7 @@ begin clkop => serdes_ref_clk, clkos => serdes_ref_clks, lock => serdes_ref_lock); + QUAD_GENERATE : for bit_index in 0 to ((HOW_MANY_CHANNELS+3)/4-1) generate begin QUAD : serdes_fpga_ref_clk @@ -412,7 +416,7 @@ begin tx_force_disp_0 => tx_force_disp_i(bit_index*8+1 downto 0+bit_index*8), tx_disp_sel_0 => "00", tx_crc_init_0 => "00", - word_align_en_0 => '1', + word_align_en_0 => '1',--word_align_en(0+bit_index*4),--'1', mca_align_en_0 => '0', felb_0 => '0', lsm_en_0 => '0', @@ -427,7 +431,7 @@ begin tx_force_disp_1 => tx_force_disp_i(3+bit_index*8 downto 2+bit_index*8), tx_disp_sel_1 => "00", tx_crc_init_1 => "00", - word_align_en_1 => '1', + word_align_en_1 => '1',--word_align_en(1+bit_index*4),--'1',-- mca_align_en_1 => '0', felb_1 => '0', lsm_en_1 => '0', @@ -442,7 +446,7 @@ begin tx_force_disp_2 => tx_force_disp_i(5+bit_index*8 downto 4+bit_index*8), tx_disp_sel_2 => "00", tx_crc_init_2 => "00", - word_align_en_2 => '1', + word_align_en_2 => '1',--word_align_en(2+bit_index*4),--'1', mca_align_en_2 => '0', felb_2 => '0', lsm_en_2 => '0', @@ -457,7 +461,7 @@ begin tx_force_disp_3 => tx_force_disp_i(7+bit_index*8 downto 6+bit_index*8), tx_disp_sel_3 => "00", tx_crc_init_3 => "00", - word_align_en_3 => '1', + word_align_en_3 => '1',--word_align_en(3+bit_index*4),--'1', mca_align_en_3 => '0', felb_3 => '0', lsm_en_3 => '0', @@ -516,6 +520,7 @@ begin ref_pclk => ref_pclk(bit_index) ); end generate QUAD_GENERATE; + word_align_en <= not rx_rst_i; FLEXI_PCS_INT : flexi_PCS_synch generic map ( HOW_MANY_CHANNELS => HOW_MANY_CHANNELS) @@ -532,7 +537,7 @@ begin TXD_SYNCH => txd_synch_i, TX_FORCE_DISP => tx_force_disp_i, FLEXI_PCS_SYNCH_STATUS => flexi_pcs_synch_status_i, - MED_DATAREADY_IN => med_dataready_in_i, + MED_DATAREADY_IN => data_valid_in_i,--med_dataready_in_i, MED_DATAREADY_OUT => med_dataready_out_i, MED_PACKET_NUM_IN => med_packet_num_in_i, MED_PACKET_NUM_OUT => med_packet_num_out_i, @@ -540,48 +545,49 @@ begin MED_READ_OUT => med_read_out_i, MED_ERROR_OUT => med_error_out_i ); - HUB_API: trb_net16_hub_base - port map ( - CLK => LVDS_CLK_200P, - RESET => ADO_TTL(0), - CLK_EN => '1', - MED_DATAREADY_OUT => med_dataready_in_i, - MED_DATA_OUT => med_data_in_i, - MED_PACKET_NUM_OUT => med_packet_num_in_i, - MED_READ_IN => med_read_out_i, - MED_DATAREADY_IN => med_dataready_out_i, - MED_DATA_IN => med_data_out_i, - MED_PACKET_NUM_IN => med_packet_num_out_i, - MED_READ_OUT => med_read_in_i, - MED_ERROR_IN => med_error_out_i, - APL_DATA_IN => (others => '0'), - APL_PACKET_NUM_IN => (others => '0'), - APL_WRITE_IN => (others => '0'), - APL_FIFO_FULL_OUT => open, - APL_SHORT_TRANSFER_IN => (others => '0'), - APL_DTYPE_IN => (others => '0'), - APL_ERROR_PATTERN_IN => (others => '0'), - APL_SEND_IN => (others => '0'), - APL_TARGET_ADDRESS_IN => (others => '0'), - APL_DATA_OUT => open, - APL_PACKET_NUM_OUT => open, - APL_TYP_OUT => open, - APL_DATAREADY_OUT => open, - APL_READ_IN => (others => '0'), - APL_RUN_OUT => open, - APL_MY_ADDRESS_IN => (others => '0'), - APL_SEQNR_OUT => open, - TRG_GOT_TRIGGER_OUT => open, - TRG_ERROR_PATTERN_OUT => open, - TRG_DTYPE_OUT => open, - TRG_SEQNR_OUT => open, - TRG_ERROR_PATTERN_IN => (others => '0'), - TRG_RELEASE_IN => (others => '0'), - HUB_STAT_CHANNEL => open, - HUB_STAT_GEN => open, - MPLEX_CTRL => mplex_ctrl_i, - MPLEX_STAT => open - ); + med_read_in_i <= (others => '1'); --test + HUB_API: trb_net16_hub_base + port map ( + CLK => LVDS_CLK_200P, + RESET => ADO_TTL(0), + CLK_EN => '1', + MED_DATAREADY_OUT => med_dataready_in_i, + MED_DATA_OUT => med_data_in_i, + MED_PACKET_NUM_OUT => med_packet_num_in_i, + MED_READ_IN => med_read_out_i, + MED_DATAREADY_IN => med_dataready_out_i, + MED_DATA_IN => med_data_out_i, + MED_PACKET_NUM_IN => med_packet_num_out_i, + MED_READ_OUT => med_read_in_i, + MED_ERROR_IN => med_error_out_i, + APL_DATA_IN => (others => '0'), + APL_PACKET_NUM_IN => (others => '0'), + APL_WRITE_IN => (others => '0'), + APL_FIFO_FULL_OUT => open, + APL_SHORT_TRANSFER_IN => (others => '0'), + APL_DTYPE_IN => (others => '0'), + APL_ERROR_PATTERN_IN => (others => '0'), + APL_SEND_IN => (others => '0'), + APL_TARGET_ADDRESS_IN => (others => '0'), + APL_DATA_OUT => open, + APL_PACKET_NUM_OUT => open, + APL_TYP_OUT => open, + APL_DATAREADY_OUT => open, + APL_READ_IN => (others => '0'), + APL_RUN_OUT => open, + APL_MY_ADDRESS_IN => (others => '0'), + APL_SEQNR_OUT => open, + TRG_GOT_TRIGGER_OUT => open, + TRG_ERROR_PATTERN_OUT => open, + TRG_DTYPE_OUT => open, + TRG_SEQNR_OUT => open, + TRG_ERROR_PATTERN_IN => (others => '0'), + TRG_RELEASE_IN => (others => '0'), + HUB_STAT_CHANNEL => open, + HUB_STAT_GEN => open, + MPLEX_CTRL => mplex_ctrl_i, + MPLEX_STAT => open + ); TRB_HUB_INT : trb_hub_interface @@ -619,37 +625,38 @@ begin HUB_REGISTER_16 => hub_register_16_i ); ADO_TTL(34 downto 9) <= (others => 'Z'); - hub_register_00_i <=flexi_pcs_synch_status_i(7 downto 0); - -- hub_register_01_i <= - hub_register_02_i <= rxd_synch_i(7 downto 0); --; --rxd_1_a(15 downto 8); - hub_register_03_i <= rxd_synch_i(23 downto 16); --cv_counter_ch1; --- hub_register_04_i <= rxd_synch_i(39 downto 32); --- hub_register_05_i <= rxd_synch_i(55 downto 48); --- hub_register_10_i <= rxd_i(7+8*16 downto 0+8*16); --; --rxd_1_a(15 downto 8); --- hub_register_11_i <= rxd_i(23+8*16 downto 16+8*16); --cv_counter_ch1; --- hub_register_12_i <= rxd_i(39+8*16 downto 32+8*16); --- hub_register_13_i <= rxd_i(63+8*16 downto 56+8*16); --- hub_register_14_i <= flexi_pcs_synch_status_i(23+8*16 downto 16+8*16); --- hub_register_15_i <= flexi_pcs_synch_status_i(39+8*16 downto 32+8*16); --- hub_register_16_i <= flexi_pcs_synch_status_i(63+8*16 downto 56+8*16); +-- hub_register_00_i <=flexi_pcs_synch_status_i(7 downto 0); +-- hub_register_01_i <= '0' & flexi_pcs_synch_status_i(18 downto 16) &'0' & flexi_pcs_synch_status_i(2 downto 0); +-- hub_register_02_i <= rxd_i(7 downto 0); --; --rxd_1_a(15 downto 8); +-- hub_register_03_i <= rxd_i(15 downto 8); --cv_counter_ch1; +-- hub_register_04_i <= rxd_i(23 downto 16); +-- -- hub_register_04_i<= rxd_synch_i(39 downto 32); +-- hub_register_05_i <= rxd_i(31 downto 24); +-- -- hub_register_10_i <= rxd_i(7+8*16 downto 0+8*16); --; --rxd_1_a(15 downto 8); +-- -- hub_register_11_i <= rxd_i(23+8*16 downto 16+8*16); --cv_counter_ch1; +-- -- hub_register_12_i <= rxd_i(39+8*16 downto 32+8*16); +-- -- hub_register_13_i <= rxd_i(63+8*16 downto 56+8*16); +-- -- hub_register_14_i <= flexi_pcs_synch_status_i(23+8*16 downto 16+8*16); +-- -- hub_register_15_i <= flexi_pcs_synch_status_i(39+8*16 downto 32+8*16); +-- -- hub_register_16_i <= flexi_pcs_synch_status_i(63+8*16 downto 56+8*16); --- hub_register_06_i <= flexi_pcs_synch_status_i(23 downto 16); --- hub_register_07_i <= flexi_pcs_synch_status_i(39 downto 32); --- hub_register_08_i <= flexi_pcs_synch_status_i(55 downto 48); --- hub_register_09_i <= x"0" & data_valid_out_i(3 downto 0); --- hub_register_0e_and_0d <= hub_register_0e_i & hub_register_0d_i; --- txd_i(15 downto 0) <= hub_register_0e_and_0d; --- txd_i(31 downto 16) <= hub_register_0e_and_0d; --- txd_i(47 downto 32) <= hub_register_0e_and_0d; --- txd_i(63 downto 48) <= hub_register_0e_and_0d; +-- hub_register_06_i <= flexi_pcs_synch_status_i(23 downto 16); +-- -- hub_register_07_i <= flexi_pcs_synch_status_i(39 downto 32); +-- -- hub_register_08_i <= flexi_pcs_synch_status_i(55 downto 48); +-- -- hub_register_09_i <= x"0" & data_valid_out_i(3 downto 0); +-- hub_register_0e_and_0d <= hub_register_0e_i & hub_register_0d_i; +-- txd_i(15 downto 0) <= hub_register_0e_and_0d; +-- txd_i(31 downto 16) <= hub_register_0e_and_0d; +-- txd_i(47 downto 32) <= hub_register_0e_and_0d; +-- txd_i(63 downto 48) <= hub_register_0e_and_0d; --- txd_i(255 downto 64) <= hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & --- hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & --- hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d; --- data_valid_in_i(0) <= hub_register_0a_i(0); --- data_valid_in_i(1) <= hub_register_0a_i(1); --- data_valid_in_i(2) <= hub_register_0a_i(2); --- data_valid_in_i(3) <= hub_register_0a_i(3); +-- -- txd_i(255 downto 64) <= hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & +-- -- hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & +-- -- hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d & hub_register_0e_and_0d; +-- data_valid_in_i(0) <= hub_register_0a_i(0); +-- data_valid_in_i(1) <= hub_register_0a_i(1); +-- data_valid_in_i(2) <= hub_register_0a_i(2); +-- data_valid_in_i(3) <= hub_register_0a_i(3); -- data_valid_in_i(4) <= hub_register_0a_i(0); -- data_valid_in_i(5) <= hub_register_0a_i(1); -- data_valid_in_i(6) <= hub_register_0a_i(2); @@ -707,7 +714,7 @@ begin if ADO_TTL(0) = '1' then -- asynchronous reset (active low) cv_counter <= (others => '0'); else - cv_counter <= cv_counter + 1; + cv_counter <= cv_counter + 1; end if; end if; end process CV_COUNTERaaa; @@ -717,7 +724,7 @@ begin if ADO_TTL(0) = '1' then -- asynchronous reset (active low) cv_countera <= (others => '0'); else - cv_countera <= cv_countera + 1; + cv_countera <= cv_countera + 1; end if; end if; end process CV_COUNTERaab;