From: Andreas Neiser Date: Fri, 23 May 2014 16:27:10 +0000 (+0200) Subject: Swithcitng to 2.5V VCCIO...LVDS33 is not defined in LPF X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=c99055b9b9027df53f92f1877614920486ce944d;p=padiwa.git Swithcitng to 2.5V VCCIO...LVDS33 is not defined in LPF --- diff --git a/pinout/adc_addon.lpf b/pinout/adc_addon.lpf index 8a06106..e5a8c09 100644 --- a/pinout/adc_addon.lpf +++ b/pinout/adc_addon.lpf @@ -28,7 +28,7 @@ LOCATE COMP "LED_GREEN" SITE "E2"; LOCATE COMP "LED_YELLOW" SITE "E3"; LOCATE COMP "LED_ORANGE" SITE "F2"; DEFINE PORT GROUP "LED_group" "LED*"; -IOBUF GROUP "LED_group" IO_TYPE=LVCMOS33; +IOBUF GROUP "LED_group" IO_TYPE=LVCMOS25; LOCATE COMP "ADC_CSB_1" SITE "E14"; LOCATE COMP "ADC_CSB_2" SITE "E13"; @@ -43,7 +43,7 @@ LOCATE COMP "ADC_CSB_10" SITE "J12"; LOCATE COMP "ADC_CSB_11" SITE "J14"; LOCATE COMP "ADC_CSB_12" SITE "J13"; DEFINE PORT GROUP "ADC_CSB_group" "ADC_CSB*"; -IOBUF GROUP "ADC_CSB_group" IO_TYPE=LVCMOS33; +IOBUF GROUP "ADC_CSB_group" IO_TYPE=LVCMOS25; # SPI to TRB LOCATE COMP "SPI_TRB_CLK_0" SITE "M11"; @@ -55,7 +55,7 @@ LOCATE COMP "SPI_TRB_IN_1" SITE "B12"; LOCATE COMP "SPI_TRB_OUT_0" SITE "M9"; LOCATE COMP "SPI_TRB_OUT_1" SITE "N10"; DEFINE PORT GROUP "SPI_TRB_group" "SPI_TRB*"; -IOBUF GROUP "SPI_TRB_group" IO_TYPE=LVCMOS33; +IOBUF GROUP "SPI_TRB_group" IO_TYPE=LVCMOS25; IOBUF PORT "SPI_TRB_IN_0" IO_TYPE=LVCMOS25; IOBUF PORT "SPI_TRB_IN_1" IO_TYPE=LVCMOS25; @@ -71,7 +71,7 @@ LOCATE COMP "SPI_CONN_H_IN" SITE "P3"; LOCATE COMP "SPI_CONN_H_OUT" SITE "P2"; DEFINE PORT GROUP "SPI_CONN_group" "SPI_CONN*"; IOBUF GROUP "SPI_CONN_group" IO_TYPE=LVDS25; -IOBUF PORT "SPI_CONN_H_OUT" IO_TYPE=LVCMOS33D; # special handling, no true LVDS available +IOBUF PORT "SPI_CONN_H_OUT" IO_TYPE=LVDS25E; # special handling, no true LVDS available # general purpose LOCATE COMP "GP_LINE_0" SITE "C12"; # GP0 @@ -85,7 +85,7 @@ LOCATE COMP "GP_LINE_7" SITE "P8"; # GP14 LOCATE COMP "GP_LINE_8" SITE "P9"; # GP16 LOCATE COMP "GP_LINE_9" SITE "N12"; # GP18 DEFINE PORT GROUP "GP_LINE_group" "GP_LINE*"; -IOBUF GROUP "GP_LINE_group" IO_TYPE=LVCMOS33D; +IOBUF GROUP "GP_LINE_group" IO_TYPE=LVDS25E; IOBUF PORT "GP_LINE_0" IO_TYPE=LVDS25;