From: Michael Wiebusch Date: Thu, 8 May 2014 09:19:07 +0000 (+0200) Subject: updated the mvdsensorcontrol docu draft X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=cf62c129974b55fa2ebce75fc3cc7ff0908b5f3b;p=mvd_docu.git updated the mvdsensorcontrol docu draft --- diff --git a/mvdsensorcontrol/.daqsetup.tex.kate-swp b/mvdsensorcontrol/.daqsetup.tex.kate-swp deleted file mode 100644 index ec33129..0000000 Binary files a/mvdsensorcontrol/.daqsetup.tex.kate-swp and /dev/null differ diff --git a/mvdsensorcontrol/daqsetup.tex b/mvdsensorcontrol/daqsetup.tex index 8fa8435..1e09254 100644 --- a/mvdsensorcontrol/daqsetup.tex +++ b/mvdsensorcontrol/daqsetup.tex @@ -90,6 +90,180 @@ and thus on the efficiency of the sensor. \label{fig:m26lines} \end{figure} +\subsection{The front-end electronics (draft!)} +\label{sec:front-end_electronics} +\subsubsection{The front-end board(draft!)} +\label{sec:front-end_board} +The front-end board serves mainly as an adaptor between the sensor FPC, to which the MIMOSA26 chip is +bonded, and the converter board. The front-end board possesses decoupling capacitors to filter off +fluctuations in the supply voltages. It also provides some circuitry to generate the clamping voltage +for the sensor or buffer a clamping voltage generated on the +\hyperref[sec:converter_board]{converter board}. +\subsubsection{The converter board(draft!)} +\label{sec:converter_board} +The converter board is the main front-end electronics component. +It is intended to electrically accommodate up to two sensors and it provides a means to monitor the +sensor's electrical behaviour. + +The converter board consists of the following circuits: +\begin{description} +\item[Power supplies] +% \paragraph{Power supplies} +For each of the two sensors, the converter board provides a power supply for the analog supply voltage +and a second one for the digital supply voltage. +The converter board is powered with \SIrange{4}{5}{\volt}; each power supply section uses an LDO +voltage regulator to provide a stable \SI{3.3}{\volt} voltage source from the board's input voltage. +The four power supplies can be switched on and off by slow control. +In addition to switching a supply off there is the possibility to short the power supply output, +so any following decoupling capacitors are discharged. +There are eight individual control signals that can be set via slow control: +\begin{description} +\item[EnaA0] +Enable analog power supply for sensor 0 +\item[EnaD0] +Enable digital power supply for sensor 0 +\item[DisA0] +Short/discharge output of analog power supply for sensor 0 +\item[DisD0] +Short/discharge output of digital power supply for sensor 0 +\item[EnaA1] +Enable analog power supply for sensor 1 +\item[EnaD1] +Enable digital power supply for sensor 1 +\item[DisA1] +Short/discharge output of analog power supply for sensor 1 +\item[DisD1] +Short/discharge output of digital power supply for sensor 1 +\end{description} +\item[ADC] +% \paragraph{ADC} +The converter board possesses two 16 bit ADCs and adjacent amplifier and multiplexer circuits +to monitor the following observables for each of the two sensors: +\begin{description} +\item[CurrentDigital] +The momentary current draw of the sensor on the digital power supply line (measured via +a shunt and a high side current mirror). +\item[CurrentAnalog] +The momentary current draw of the sensor on the analog power supply line (measured via +a shunt and a high side current mirror). +\item[VoltageDigital] +The momentary voltage of the sensor's digital power supply line (measured via a sense line). +\item[VoltageAnalog] +The momentary voltage of the sensor's analog power supply line (measured via a sense line). +\item[VoltageGnd] +The voltage drop on the ground line between sensor and converter board (measured via a sense line). +\item[SensorTemperature] +The voltage drop on a forward biased diode on the silicon bulk of the MIMOSA26 chip. The voltage shows +a negative temperature dependence (the lower the voltage drop, the warmer the chip). +\item[VDiscRef2A-VDiscRef2D] +The voltages on the VDISCREF2 outputs of the sensor. These are test outputs to review the baseline +voltages of the discriminator circuit, which are set via a JTAG controllable +DAC\footnote{JTAG register "DAC\_BIAS", field "IVDREF2"}. +There are four individual test outputs, since the +baseline voltage is actively buffered for each quarter of the sensor and each buffer introduces +a different voltage offset. +The DAC range is \SIrange{0}{2.7}{\volt} according to the datasheet. +\item[VDiscRefA-VDiscRefD] +The voltages on the discriminator reference voltage outputs, measured relative to their respective +baseline. The readings of these channels directly show the discriminator threshold voltages +that are generated by four individual +DACs\footnote{JTAG register "DAC\_BIAS", fields "IVDREF1A-IVDREF1D"} +inside the chip. The DAC range is \SIrange{-32}{32}{\milli\volt} according to the datasheet. +For these input channels the converter board has a measuring range from \SIrange{-39.9}{39.9}{\volt}. +\item[ZeroSingle] +Calibration offset that has to be subtracted from VDiscRef2A-VDiscRef2D to reduce systematic +uncertainty introduced by the multiplexer and amplifier circuitry. +\item[ZeroDifferential] +Calibration offset that has to be subtracted from VDiscRefA-VDiscRefD to reduce systematic +uncertainty introduced by the multiplexer and amplifier circuitry. +\end{description} +\item[Latchup detection circuit] +% \paragraph{Latchup detection circuit} +Each power supply unit has a shunt plus a high side current mirror in order to measure the +voltage drop on the shunt that is proportional to the output current. +This voltage drop is not only measured by the ADC section, but also monitored by an analog comparator. +The comparator also receives a reference voltage from a programmable on-board DAC. +If the output current exceeds a certain threshold, depending on the DAC setting, a fast digital signal +is generated by the comparator indicating an overcurrent situation. +\item[Programmable DAC] +% \paragraph{Programmable DAC} +On the converter board there is one programmable eight channel digital to analog converter (DAC). +Six of its channels are used for the following purposes: +\begin{itemize} +\item +Sensor 0 analog overcurrent threshold reference voltage +\item +Sensor 0 digital overcurrent threshold reference voltage +\item +Sensor 0 clamping voltage +\item +Sensor 1 analog overcurrent threshold reference voltage +\item +Sensor 1 digital overcurrent threshold reference voltage +\item +Sensor 1 clamping voltage +\end{itemize} +The clamping voltage outputs of the DAC is only connected to the sensors if the proper jumpers/solder +bridges are closed. +% \paragraph{Signal switches} +\item[Signal switches] +The converter board provides semiconductor switches to enable/disable the sensor control signals +and to enable/bypass JTAG for each sensor. +There are four individual control signals that can be set by slow control: +\begin{description} +\item[SensorEn0] +Enable CLKL, RESET and START for sensor 0. +\item[JtagEn0] +Enable JTAG communication for sensor 0 if this signal is 1. Bypass sensor 0 in JTAG chain when +signal is 0. +\item[SensorEn1] +Enable CLKL, RESET and START for sensor 1. +\item[JtagEn1] +Enable JTAG communication for sensor 1 if this signal is 1. Bypass sensor 1 in JTAG chain when +signal is 0. +\end{description} +% \paragraph{Microcontroller} +\item[Microcontroller] +[stm32 blah blah ??] + +% \paragraph{Signal buffers and signal converters} +\item[Signal buffers and signal converters] +All signals between the converter board and the TRB3 are exchanged via LVDS lines to use the most +stable transmission technique. After all this connection is the longest distance in the set-up +that needs to be bridged by copper cables. +On the other side of the board, the MIMOSA26 sensor uses a mixture of LVDS and LVTTL signals. +Different kinds of signal buffers\footnote{Not data buffers/FIFOs but +signal buffers/drivers/impedance converters} +and converters are employed on the converter board: +\begin{description} +\item[Sensor data LVDS buffers] +The serial data outputs of the sensors (D0, D1, MKD and CLKD) are fed through LVDS buffers +to unburden the sensor's internal LVDS output drivers. +\item[Sensor main clock LVDS buffer] +The sensor receives an \SI{80}{\mega\hertz} LVDS clock signal from the JTAG controller. +This signal is repeated via an LVDS buffer on the converter board. +\item[JTAG and sensor control LVDS$\Leftrightarrow$LVTTL converters] +The sensor possesses an LVTTL JTAG interface. The converter board provides +LVDS$\Leftrightarrow$LVTTL converters to connect the sensor's JTAG LVTTL signal lines to the +LVDS signal lines of the FPGA that hosts the JTAG controller entity. +The same is true for the RESET and the START signal that the sensor receives from the JTAG +controller. +\item[Microcontroller SPI and UART LVDS$\Leftrightarrow$LVTTL converter] +The microcontroller communicates with the CbController via an SPI and a UART interface. +Both are LVTTL interfaces on the microcontroller side and LVDS on the FPGA side, so the +converter board provides the proper converters. +\item[Overcurrent LVDS$\Leftrightarrow$LVTTL converter] +Each power supply has an overcurrent indicator LVTTL signal which has to be converted to LVDS +in order to be monitored by the CbController FPGA entity. +\end{description} + +% \item[Signal switches] +% \item[Flat cable connector] + + +\end{description} + + \subsection{TRB3 FPGA board} \begin{figure}[H] @@ -124,7 +298,8 @@ The design for the TRB3 peripheral FPGAs consists of three main entities: The readout controller (ROC), the JTAG controller and the converter board controller (CbController). Each of the three has its distinct functionality. \subsubsection{Readout controller} -The readout controller captures the synchronous serial data stream coming from the sensor. +The readout controller\footnote{Implemented by Borislav Milanovic during his PhD. studies} +captures the synchronous serial data stream coming from the sensor. By means of the front-end electronics and dedicated FPGA pins the readout controller receives the following (differential) signals from the sensor: \begin{description} @@ -138,41 +313,42 @@ is constantly high) Serial data output for the first half of the sensor data. \item[D1] Serial data output for the second half of the sensor data. - \end{description} +The ROC buffers the two serial data streams and provides a mechanism that allows the data to +cross from the sensor clock domain (\SI{80}{\mega\hertz}) to the FPGA clock domain +(\SI{100}{\mega\hertz}). It then combines the two data streams, checks the data for consistency +and adds status information as well as a sensor id. The new composite data stream is then transmitted +to a data acquisition computer via TRBnet where the data is finally stored. +\subsubsection{JTAG controller} +\label{sec:JTAG_controller} +While the ROC is concerned with the data coming from the sensor, the JTAG controller\footnote{ +Developed by Bertram Neuman during his master's thesis} handles the +communication to the sensor. The MIMOSA26 sensor possesses a JTAG interface (a synchronous serial +data interface) that provides access to the settings registers of the chip. +Multiple sensors can have their JTAG interfaces connected in series (comparable to shift registers) +and then be operated with a single JTAG controller. +The JTAG controller receives the sensor settings via TRBnet (slow control network) and is then able +to program the sensors with their respecitve settings automatically. +Furthermore the JTAG controller controls the START and the RESET signal of the sensor, so the sensor +can be initialized and reset via slow control commands. -\subsection{JTAG controller} - -\subsection{Converter board controller} - -\begin{itemize} -\item -hub -\item -ccu -\item -roc - \begin{itemize} - \item - actual roc - \item - JTAG - \item - CbController - \end{itemize} -\item -\end{itemize} - -\subsection{Converter board v2013} -The converter board is the key component -??-> what to write -\begin{itemize} -\item -Key component of the front-end electronics -\item -Regulated power supplies (linear, switchable), voltage and consumption can be measured -\item -blah +See section \ref{sec:JTAG_programming} for more details about JTAG registers and their manipulation. -\end{itemize} +\subsubsection{Converter board controller} +The converter board controller is not directly involved in the communication with the sensor. +It acts as a slow control bridge to the functionality of the +\hyperref[sec:converter_board]{converter board}, thus +the entity allows for the switching of power and signal lines to and from the sensor via slow control. +Furthermore it is involved in the acquisition of sensor status information, +such as sensor temperature and power consumption. +For communication with the converter board the entity includes an SPI slave interface and a +bidirectional UART. +The CbController entity forwards slow control commands to the converter board via the UART and +receives status information from the converter board. +The SPI slave constantly receives a joint data stream of all voltage and current measurements performed +by the ADCs on the converter board. +The readings get stored in dedicated registers and are refreshed continuously. The register contents +can then be read out via slow control requests. +\subsubsection{hub/ccu?(draft!)} +[??placeholder] diff --git a/mvdsensorcontrol/jtag.tex b/mvdsensorcontrol/jtag.tex index ad28ada..4a50aeb 100644 --- a/mvdsensorcontrol/jtag.tex +++ b/mvdsensorcontrol/jtag.tex @@ -1,4 +1,5 @@ \section{JTAG programming} +\label{sec:JTAG_programming} \subsection{MIMOSA26 registers and the JTAG controller entity} @@ -14,7 +15,8 @@ The MIMOSA26 chip posesses 11 JTAG settings registers, wich are hardwired to dis readout logic part of the sensor (see Figure \ref{fig:M26andItsRegisters}). Most registers are sub-divided into multiple data fields of variable length (see Figure \ref{fig:datafields}). Each of the in total 82 datafields corresponds to a distinct function or configurable quantity inside the sensor. -The JTAG programming is handled by a dedicated FPGA design entity, the JTAG Controller. +The JTAG programming is handled by a dedicated FPGA design entity, the +\hyperref[sec:JTAG_controller]{JTAG controller}. This entity receives commands from the programming software on a regular PC. \begin{figure}[H] diff --git a/mvdsensorcontrol/remarks.tex b/mvdsensorcontrol/remarks.tex index 24c4370..96617b8 100644 --- a/mvdsensorcontrol/remarks.tex +++ b/mvdsensorcontrol/remarks.tex @@ -35,4 +35,11 @@ Front End Board ?? \item Elaborate on the elements of the config XML file. +\end{itemize} + +\subsection{to investigate} +\begin{itemize} +\item +how does the data flow go with the roc/hub/evtbuilder? + \end{itemize} \ No newline at end of file