From: Andreas Neiser <neiser@kph.uni-mainz.de>
Date: Mon, 20 Apr 2015 17:12:25 +0000 (+0200)
Subject: Add one bit to baseline average
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=d0663356ecc95cafd719e92edfa161191a566758;p=trb3.git

Add one bit to baseline average
---

diff --git a/ADC/source/adc_handler.vhd b/ADC/source/adc_handler.vhd
index 922fe9e..833e57a 100644
--- a/ADC/source/adc_handler.vhd
+++ b/ADC/source/adc_handler.vhd
@@ -422,7 +422,7 @@ begin
             when x"13" =>
               BUS_TX.data(9 downto 0)                          <= std_logic_vector(config_cfd.InputThreshold);
               BUS_TX.data(17)                                  <= config_cfd.PolarityInvert;
-            when x"16" => BUS_TX.data(3 downto 0)              <= std_logic_vector(config_cfd.BaselineAverage);
+            when x"16" => BUS_TX.data(4 downto 0)              <= std_logic_vector(config_cfd.BaselineAverage);
             when x"17" => BUS_TX.data(31 downto 0)             <= config_cfd.TriggerEnable(31 downto 0);
             when x"18" => BUS_TX.data(15 downto 0)             <= config_cfd.TriggerEnable(47 downto 32);
             when x"19" => BUS_TX.data(RESOLUTION - 1 downto 0) <= config_cfd.CheckWord1;
@@ -469,7 +469,7 @@ begin
             when x"13" =>
               config_cfd.InputThreshold                          <= unsigned(BUS_RX.data(9 downto 0));
               config_cfd.PolarityInvert                          <= BUS_RX.data(17);
-            when x"16" => config_cfd.BaselineAverage             <= unsigned(BUS_RX.data(3 downto 0));
+            when x"16" => config_cfd.BaselineAverage             <= unsigned(BUS_RX.data(4 downto 0));
             when x"17" => config_cfd.TriggerEnable(31 downto 0)  <= BUS_RX.data(31 downto 0);
             when x"18" => config_cfd.TriggerEnable(47 downto 32) <= BUS_RX.data(15 downto 0);
             when x"19" =>
diff --git a/ADC/source/adc_package.vhd b/ADC/source/adc_package.vhd
index 1f493c9..ec29c5b 100644
--- a/ADC/source/adc_package.vhd
+++ b/ADC/source/adc_package.vhd
@@ -46,7 +46,7 @@ package adc_package is
     DebugMode   : integer range 0 to 3; -- 0 CFD events, debug: 1 raw, 2 subtracted, 3 cfd
     InputThreshold   : unsigned(9 downto 0);
     PolarityInvert   : std_logic;
-    BaselineAverage  : unsigned(3 downto 0);
+    BaselineAverage  : unsigned(4 downto 0);
     BaselineAlwaysOn : std_logic;
     CFDDelay         : unsigned(4 downto 0);
     CFDMult          : unsigned(3 downto 0);