From: Maps Date: Tue, 23 Sep 2014 09:57:16 +0000 (+0200) Subject: Clock Generator Board X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=d2c74e80c69454adf2c6c2899b2fdd922e4e4184;p=electronics.git Clock Generator Board --- diff --git a/ClockGenerator/BOM.csv b/ClockGenerator/BOM.csv new file mode 100755 index 0000000..76f7fbb --- /dev/null +++ b/ClockGenerator/BOM.csv @@ -0,0 +1,21 @@ +Comment,Description,Footprint,LibRef,OrderCode,Quantity,Value + +"C0805","Capacitor 10uF 0805","0805 Generic","C 0805 10u","","3","10uF" +"C0402","Capacitor 100nF 0402","0402Generic","C 0402 100n","","5","100nF" +"LED (white)","LED 0402 white. 2k1@3V3","0402 LED","LW QH8G","","1","" +"Z-Diode 6V8","Zener Diode 6.8V","DO214","Z-Diode 6V8","1SMB5920BT3G","1","" +"Fuse 0402","Fuse","0402Generic","Fuse 0402","0402SFF200F/24-2CT-ND","1","" +"IKF_HEADER","IKF Logo","IKF_LOGO_SMALL","IKF_HEADER","","1","" +"BLM18PG471SN1","BLM18PG471SN1","0603 GENERIC","BLM18PG471SN1","490-5223-1-ND","1","BLM18PG471" +"37203-1AEO-003-PL","Socket 37203-1AEO-003-PL","37203-1AEO-003-PL","37203-1AEO-003-PL","","1","" +"Header 2 90deg","103906-1","HDR1X2H","Header 2 90deg","A28618-ND","3","" +"R 0402","R 0402 0R","0402 solder bridge","R 0402 0R","","20","0R" +"R 0402","R 0402 21k0","0402Generic","R 0402 21k0","","1","21k0" +"R 0402","R 0402 3k3","0402Generic","R 0402 3k3","","1","3k3" +"R 0402","5k1","0402Generic","R 0402 5k1","","1","5k1" +"R 0402","R 0402 100R","0402Generic","R 0402 100R","","2","100" +"R 0402","R 0402 270R","0402Generic","R 0402 270R","","3","270" +"RJHSE-538X","Ampehnol RJ45 8pol. Jack","RJ-45","RJHSE-538X","","3","" +"ADP123AUJZ","5,5V Input, 300mA, Low Quiescent Current, Linear Regulator","SOT23-5","ADP123AUJZ","ADP123AUJZ-R7CT-ND","1","" +"CDCLVD1208","","QFN-S28_M","CDCLVD1208","","1","" +"SI531","","SI530 Oscillator","SI531","","1","" diff --git a/ClockGenerator/ClockGenerator.PDF b/ClockGenerator/ClockGenerator.PDF new file mode 100755 index 0000000..e68aa36 Binary files /dev/null and b/ClockGenerator/ClockGenerator.PDF differ diff --git a/ClockGenerator/ClockGenerator.PcbDoc b/ClockGenerator/ClockGenerator.PcbDoc new file mode 100755 index 0000000..4fe7d27 Binary files /dev/null and b/ClockGenerator/ClockGenerator.PcbDoc differ diff --git a/ClockGenerator/ClockGenerator.PrjPCB b/ClockGenerator/ClockGenerator.PrjPCB new file mode 100755 index 0000000..1820941 --- /dev/null +++ b/ClockGenerator/ClockGenerator.PrjPCB @@ -0,0 +1,1183 @@ +[Design] +Version=1.0 +HierarchyMode=0 +ChannelRoomNamingStyle=0 +LogFolderPath= +ReleasesFolder= +ReleaseVaultGUID= +ReleaseVaultName= +ChannelDesignatorFormatString=$Component_$RoomName +ChannelRoomLevelSeperator=_ +OpenOutputs=1 +ArchiveProject=0 +TimestampOutput=0 +SeparateFolders=0 +TemplateLocationPath= +PinSwapBy_Netlabel=1 +PinSwapBy_Pin=1 +AllowPortNetNames=0 +AllowSheetEntryNetNames=1 +AppendSheetNumberToLocalNets=0 +NetlistSinglePinNets=0 +DefaultConfiguration=Default Configuration +UserID=0xFFFFFFFF +DefaultPcbProtel=1 +DefaultPcbPcad=0 +ReorderDocumentsOnCompile=1 +NameNetsHierarchically=0 +PowerPortNamesTakePriority=0 +PushECOToAnnotationFile=1 +DItemRevisionGUID= +ReportSuppressedErrorsInMessages=0 +OutputPath= + +[Document1] +DocumentPath=..\..\CB2013\CB2013.SCHLIB +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Document2] +DocumentPath=ClockGenerator.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=0 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Document3] +DocumentPath=..\..\CB2013\CB2013.PcbLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Document4] +DocumentPath=ClockGenerator.PcbDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 + +[Configuration1] +Name=Default Configuration +ParameterCount=0 +ConstraintFileCount=0 +ReleaseItemId= +CurrentRevision= +Variant=[No Variations] +GenerateBOM=1 +OutputJobsCount=0 + +[OutputGroup1] +Name=Netlist Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=CadnetixNetlist +OutputName1=Cadnetix Netlist +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=CalayNetlist +OutputName2=Calay Netlist +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=EDIF +OutputName3=EDIF for PCB +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=EESofNetlist +OutputName4=EESof Netlist +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +OutputType5=IntergraphNetlist +OutputName5=Intergraph Netlist +OutputDocumentPath5= +OutputVariantName5= +OutputDefault5=0 +OutputType6=MentorBoardStationNetlist +OutputName6=Mentor BoardStation Netlist +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 +OutputType7=MultiWire +OutputName7=MultiWire +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=OrCadPCB2Netlist +OutputName8=Orcad/PCB2 Netlist +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=PADSNetlist +OutputName9=PADS ASCII Netlist +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 +OutputType10=Pcad +OutputName10=Pcad for PCB +OutputDocumentPath10= +OutputVariantName10= +OutputDefault10=0 +OutputType11=PCADNetlist +OutputName11=PCAD Netlist +OutputDocumentPath11= +OutputVariantName11= +OutputDefault11=0 +OutputType12=PCADnltNetlist +OutputName12=PCADnlt Netlist +OutputDocumentPath12= +OutputVariantName12= +OutputDefault12=0 +OutputType13=Protel2Netlist +OutputName13=Protel2 Netlist +OutputDocumentPath13= +OutputVariantName13= +OutputDefault13=0 +OutputType14=ProtelNetlist +OutputName14=Protel +OutputDocumentPath14= +OutputVariantName14= +OutputDefault14=0 +OutputType15=RacalNetlist +OutputName15=Racal Netlist +OutputDocumentPath15= +OutputVariantName15= +OutputDefault15=0 +OutputType16=RINFNetlist +OutputName16=RINF Netlist +OutputDocumentPath16= +OutputVariantName16= +OutputDefault16=0 +OutputType17=SciCardsNetlist +OutputName17=SciCards Netlist +OutputDocumentPath17= +OutputVariantName17= +OutputDefault17=0 +OutputType18=SIMetrixNetlist +OutputName18=SIMetrix +OutputDocumentPath18= +OutputVariantName18= +OutputDefault18=0 +OutputType19=SIMPLISNetlist +OutputName19=SIMPLIS +OutputDocumentPath19= +OutputVariantName19= +OutputDefault19=0 +OutputType20=TangoNetlist +OutputName20=Tango Netlist +OutputDocumentPath20= +OutputVariantName20= +OutputDefault20=0 +OutputType21=TelesisNetlist +OutputName21=Telesis Netlist +OutputDocumentPath21= +OutputVariantName21= +OutputDefault21=0 +OutputType22=Verilog +OutputName22=Verilog File +OutputDocumentPath22= +OutputVariantName22= +OutputDefault22=0 +OutputType23=VHDL +OutputName23=VHDL File +OutputDocumentPath23= +OutputVariantName23= +OutputDefault23=0 +OutputType24=WireListNetlist +OutputName24=WireList Netlist +OutputDocumentPath24= +OutputVariantName24= +OutputDefault24=0 +OutputType25=XSpiceNetlist +OutputName25=XSpice Netlist +OutputDocumentPath25= +OutputVariantName25= +OutputDefault25=0 + +[OutputGroup2] +Name=Simulator Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=AdvSimNetlist +OutputName1=Mixed Sim +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=SIMetrix_Sim +OutputName2=SIMetrix +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=SIMPLIS_Sim +OutputName3=SIMPLIS +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 + +[OutputGroup3] +Name=Documentation Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=Assembler Source Print +OutputName1=Assembler Source Prints +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType2=C Source Print +OutputName2=C Source Prints +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 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Variations] +OutputDefault6=0 + +[OutputGroup7] +Name=Other Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=Text Print +OutputName1=Text Print +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType2=Text Print +OutputName2=Text Print +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 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+OutputName1=Design Rules Check +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType2=Differences Report +OutputName2=Differences Report +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType3=Electrical Rules Check +OutputName3=Electrical Rules Check +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 +OutputType4=Footprint Comparison Report +OutputName4=Footprint Comparison Report +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 + +[OutputGroup9] +Name=Export Outputs +Description= +TargetPrinter=HP LaserJet P2050 Series PCL6 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 +OutputType1=AutoCAD dwg/dxf PCB +OutputName1=AutoCAD dwg/dxf File PCB +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=AutoCAD dwg/dxf Schematic +OutputName2=AutoCAD dwg/dxf File Schematic +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=ExportIDF +OutputName3=Export IDF +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=ExportSTEP +OutputName4=Export STEP +OutputDocumentPath4= +OutputVariantName4=[No Variations] +OutputDefault4=0 + +[Modification Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 +Type44=1 +Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 +Type50=1 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=1 +Type57=1 +Type58=1 +Type59=1 +Type60=1 +Type61=1 +Type62=1 +Type63=1 +Type64=1 +Type65=1 +Type66=1 +Type67=1 +Type68=1 +Type69=1 +Type70=1 +Type71=1 +Type72=1 +Type73=1 +Type74=1 +Type75=1 +Type76=1 +Type77=1 +Type78=1 + +[Difference Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 + +[Electrical Rules Check] +Type1=1 +Type2=1 +Type3=2 +Type4=1 +Type5=2 +Type6=2 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=2 +Type12=2 +Type13=2 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=2 +Type26=2 +Type27=2 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=2 +Type33=2 +Type34=2 +Type35=1 +Type36=2 +Type37=1 +Type38=2 +Type39=2 +Type40=2 +Type41=0 +Type42=2 +Type43=1 +Type44=1 +Type45=2 +Type46=1 +Type47=2 +Type48=2 +Type49=1 +Type50=2 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 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Type +ComponentLibraryIdentifier12=CB2013.SCHLIB +ComponentDesignItemID12=RJHSE-538X +ComponentSymbolReference12=RJHSE-538X +ComponentUpdate12=1 +ComponentIsDeviceSheet12=0 +ComponentLibIdentifierKind13=Library Name And Type +ComponentLibraryIdentifier13=CB2013.SCHLIB +ComponentDesignItemID13=SI531 +ComponentSymbolReference13=SI531 +ComponentUpdate13=1 +ComponentIsDeviceSheet13=0 +FullReplace=1 +UpdateDesignatorLock=1 +UpdatePartIDLock=1 +PreserveParameterLocations=1 +DoGraphics=1 +DoParameters=1 +DoModels=1 +AddParameters=0 +RemoveParameters=0 +AddModels=1 +RemoveModels=1 +UpdateCurrentModels=1 +ParameterName0=Comment +ParameterUpdate0=1 +ParameterName1=Component Kind +ParameterUpdate1=1 +ParameterName2=Description +ParameterUpdate2=1 +ParameterName3=Distributor +ParameterUpdate3=1 +ParameterName4=LatestRevisionDate +ParameterUpdate4=1 +ParameterName5=LatestRevisionNote +ParameterUpdate5=1 +ParameterName6=Library Reference +ParameterUpdate6=1 +ParameterName7=Manufacturer +ParameterUpdate7=1 +ParameterName8=Order Nr. +ParameterUpdate8=1 +ParameterName9=OrderCode +ParameterUpdate9=1 +ParameterName10=PackageReference +ParameterUpdate10=1 +ParameterName11=Publisher +ParameterUpdate11=1 +ParameterName12=Value +ParameterUpdate12=1 +ModelTypeGroup0=PCBLIB +ModelTypeUpdate0=1 +ModelType0=PCBLIB +ModelName0=0402 LED +ModelUpdate0=1 +ModelType1=PCBLIB +ModelName1=0402 solder bridge +ModelUpdate1=1 +ModelType2=PCBLIB +ModelName2=0402Generic +ModelUpdate2=1 +ModelType3=PCBLIB +ModelName3=0603 GENERIC +ModelUpdate3=1 +ModelType4=PCBLIB +ModelName4=0805 Generic +ModelUpdate4=1 +ModelType5=PCBLIB +ModelName5=37203-1AEO-003-PL +ModelUpdate5=1 +ModelType6=PCBLIB +ModelName6=HDR1X2H +ModelUpdate6=1 +ModelType7=PCBLIB +ModelName7=MICRO8EP +ModelUpdate7=1 +ModelType8=PCBLIB +ModelName8=RJ-45 +ModelUpdate8=1 +ModelType9=PCBLIB +ModelName9=SI530 Oscillator +ModelUpdate9=1 +ModelTypeGroup1=SI +ModelTypeUpdate1=1 +ModelType10=SI +ModelName10=Cap +ModelUpdate10=1 +ModelType11=SI +ModelName11=Connector +ModelUpdate11=1 +ModelType12=SI +ModelName12=Inductor +ModelUpdate12=1 +ModelType13=SI +ModelName13=Res +ModelUpdate13=1 +ModelTypeGroup2=SIM +ModelTypeUpdate2=1 +ModelType14=SIM +ModelName14=INDUCTOR +ModelUpdate14=1 +ModelType15=SIM +ModelName15=LED2 +ModelUpdate15=1 + +[DatabaseUpdateOptions] +SelectedOnly=0 +PartTypes=0 + +[Comparison Options] +ComparisonOptions0=Kind=Net|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions1=Kind=Net Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions2=Kind=Component Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions3=Kind=Rule|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions4=Kind=Differential Pair|MinPercent=50|MinMatch=1|ShowMatch=0|Confirm=0|UseName=0|InclAllRules=0 +ComparisonOptions5=Kind=Structure Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 + +[SmartPDF] +PageOptions=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 + diff --git a/ClockGenerator/ClockGenerator.PrjPCBStructure b/ClockGenerator/ClockGenerator.PrjPCBStructure new file mode 100755 index 0000000..66d1c53 --- /dev/null +++ b/ClockGenerator/ClockGenerator.PrjPCBStructure @@ -0,0 +1 @@ +Record=TopLevelDocument|FileName=ClockGenerator.SchDoc diff --git a/ClockGenerator/ClockGenerator.SchDoc b/ClockGenerator/ClockGenerator.SchDoc new file mode 100755 index 0000000..de5f6c2 Binary files /dev/null and b/ClockGenerator/ClockGenerator.SchDoc differ diff --git a/Power/PowerSwitch.PrjPCB b/Power/PowerSwitch.PrjPCB index 0e7f380..00087df 100755 --- a/Power/PowerSwitch.PrjPCB +++ b/Power/PowerSwitch.PrjPCB @@ -29,7 +29,7 @@ PowerPortNamesTakePriority=0 PushECOToAnnotationFile=1 DItemRevisionGUID= ReportSuppressedErrorsInMessages=0 -OutputPath=Project Outputs for PowerSwitch +OutputPath= [Document1] DocumentPath=PowerSwitch.SchDoc @@ -160,7 +160,7 @@ SCH_HasExpandLogicalToPhysicalSheets=-1 SaveSettingsToOutJob=-1 [Generic_EDE] -OutputDir=Project Outputs for PowerSwitch +OutputDir= [OutputGroup1] Name=Netlist Outputs @@ -541,7 +541,7 @@ Configuration4_Item2=OpenExported=False|AddToProject=False|ForceFit=False|NotFit Configuration4_Name3=GroupOrder Configuration4_Item3=Comment=True|Footprint=True Configuration4_Name4=OutputConfigurationParameter1 -Configuration4_Item4=???? +Configuration4_Item4=???? Configuration4_Name5=SortOrder Configuration4_Item5=Comment=Down Configuration4_Name6=VisibleOrder @@ -1326,4 +1326,10 @@ Configuration_Name9=OutputConfigurationParameter9 Configuration_Item9=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical13|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer Configuration_Name10=OutputConfigurationParameter10 Configuration_Item10=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical15|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer +Configuration_Name11=OutputConfigurationParameter11 +Configuration_Item11=IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|IncludeViewports=True|Index=1|Mirror=False|Name=New PrintOut 1|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False +Configuration_Name12=OutputConfigurationParameter12 +Configuration_Item12=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopOverlay|Polygon=Full|PrintOutIndex=1|Record=PcbPrintLayer +Configuration_Name13=OutputConfigurationParameter13 +Configuration_Item13=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopSolder|Polygon=Full|PrintOutIndex=1|Record=PcbPrintLayer diff --git a/Power/bom.txt b/Power/bom.txt new file mode 100755 index 0000000..7c64e3c --- /dev/null +++ b/Power/bom.txt @@ -0,0 +1,19 @@ +Comment Description Footprint Distributor OrderCode Quantity Value + +"ZXCT1022" "Low offset high-side current monitor" "SOT23-5" "Digikey" "ZXCT1022E5TA" "2" "" +"ZTTCR8MG" "Ceramic Resonator ZTTCR8MG" "Resonator" "TME" "ZTTCR8MG" "1" "" +"SW-PB" "Switch" "6x6_Taster" "TME" "TACT-64N-F" "2" "" +"Relay-FRM18A" "FRM18A-5VDC" "Relay Slimline" "TME" "FRM18A-5VDC" "2" "" +"R 1206" "R 1206 0R022" "1206 Generic" "TME" "SMD1206-0R022" "2" "0R022" +"R 0603" "R 0603 0R" "0603 Generic" "" "" "2" "0R" +"R 0402" "R 0402 3k3" "0402Generic" "" "" "2" "3k3" +"LED (white)" "LED 0402 white. 2k1@3V3" "0402 LED" "GSI" "" "2" "" +"Header 5X2H" "Header, 5-Pin, Dual row, angled" "HDR2X5H" "" "" "1" "" +"Header 5X2" "Header, 5-Pin, Dual row" "HDR2X5" "" "" "1" "" +"Diode 1N4148" "High Conductance Fast Diode" "0603_LED" "TME" "1N4148-0603" "2" "" +"C0805" "Capacitor 10uF 0805" "0805 Generic" "" "" "1" "10uF" +"C0402" "Capacitor 100nF 0402" "0402Generic" "" "" "3" "100nF" +"BSS123" "N-channel Enhancement Mode Vertical D-MOSFET" "SOT23" "TME" "BSS123" "2" "" +"ATtiny441-SSU" "8-bit AVR Microcontroller, 1.8-5.5V, 4KB Flash, 256 Bytes EEPROM, 256 Bytes SRAM, 14-pin SOIC, Industrial Grade (-40°C to 85°C), Pb-Free" "SO14_150MIL" "Digikey" "ATTINY441-SSU-ND" "1" "" +"ADuM1201" "Dual Channel Digital Isolator" "SO8_STEP" "TME" "ADuM1201ARZ" "1" "" +"37203-1AEO-003-PL" "Socket 37203-1AEO-003-PL" "37203-1AEO-003-PL" "GSI" "" "3" ""