From: Michael Boehmer Date: Sun, 30 Jan 2022 20:51:11 +0000 (+0100) Subject: changed delay measurement time X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=d2e7f93eb037fcb66600e94913bb0067f8877291;p=trbnet.git changed delay measurement time --- diff --git a/special/phaser.vhd b/special/phaser.vhd index 936fd2e..a1c8ae4 100644 --- a/special/phaser.vhd +++ b/special/phaser.vhd @@ -26,14 +26,14 @@ architecture arch of phaser is -- state machine signals -- Signals - signal hi_cnt : unsigned(20 downto 0); - signal cyc_cnt : unsigned(20 downto 0); + signal hi_cnt : unsigned(19 downto 0); + signal cyc_cnt : unsigned(19 downto 0); signal update : std_logic; signal cyc_done_x : std_logic; signal cyc_done : std_logic; signal phase_x : std_logic; signal phase : std_logic; - signal hi_cnt_int : std_logic_vector(20 downto 0); + signal hi_cnt_int : std_logic_vector(19 downto 0); signal coarse_counter : unsigned(11 downto 0); signal coarse_delay : std_logic_vector(11 downto 0); @@ -87,7 +87,7 @@ begin end if; end process THE_CYC_CNT_PROC; - cyc_done_x <= '1' when (cyc_cnt = x"fffffc") else '0'; + cyc_done_x <= '1' when (cyc_cnt = x"ffffc") else '0'; -- high signal count THE_HI_CNT_PROC: process( SAMPLE_CLK, RESET )