From: Hadaq in Frankfurt Date: Sun, 31 Mar 2013 21:14:13 +0000 (+0200) Subject: renamed filename{} to files{} due to some other command named filename... X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=dc569e3a1a8df28a96078ba46a9e4c6b6fd998f1;p=daqdocu.git renamed filename{} to files{} due to some other command named filename... --- diff --git a/trb3/CtsHowtos.tex b/trb3/CtsHowtos.tex index 4018e8d..287b82e 100644 --- a/trb3/CtsHowtos.tex +++ b/trb3/CtsHowtos.tex @@ -8,7 +8,7 @@ most one ETM. The module is directly linked to the trigger channel with the highest priority. Listing \ref{lst:cts_howto_etm_instantiation} shows a minimal ETM instantiation. For a better readability, it is highly - recommended, that you keep the port's naming. Copy this into the top entity (\filename{trb3\_central.vhd}). Make sure + recommended, that you keep the port's naming. Copy this into the top entity (\files{trb3\_central.vhd}). Make sure there is no active code to instantiate another module (e.g. comment out the CBM/MBS part). You probably need to add signals, e.g. to interface with off-board electronics. The semantics of the CTS interface are very straight-forward: diff --git a/trb3/CtsSlowControl.tex b/trb3/CtsSlowControl.tex index 6509bba..5249f75 100644 --- a/trb3/CtsSlowControl.tex +++ b/trb3/CtsSlowControl.tex @@ -131,7 +131,7 @@ \begin{information} The following list states block types currently used and roughly describes their structure. If you require detailed information about single bits, look into the source file of the corresponding driver module placed under - \filename{\texttildelow /trbsoft/trb3/cts/CtsPlugins/CtsMod\textbf{\{ID\}}.pm}. These contain a (hopefully) self-explanatory register definition. + \files{\texttildelow /trbsoft/trb3/cts/CtsPlugins/CtsMod\textbf{\{ID\}}.pm}. These contain a (hopefully) self-explanatory register definition. This way you make sure, you get the most recent definitions. To obtain a full register list, use the \cmdname{list} command of the cts CLI (see section \ref{sec:cts_gs_cli}). \end{information} diff --git a/trb3/Trb3GeneralRemarks.tex b/trb3/Trb3GeneralRemarks.tex index 5421101..fc525ed 100644 --- a/trb3/Trb3GeneralRemarks.tex +++ b/trb3/Trb3GeneralRemarks.tex @@ -13,7 +13,7 @@ The TRB3 boards are equipped with 5 temperature sensors, one for each FPGA. They This information can be read out after the first initial programming of the FPGAs. The board itself has a sticker with a three-digit serial number to identify it (we are looking into a bright future of the TRB3 ;-)). -The combination of serial number and unique ids is given in the file \filename{serials\_trb3.db} available in the main directory of the cvs repository. For each board it contains five lines +The combination of serial number and unique ids is given in the file \files{serials\_trb3.db} available in the main directory of the cvs repository. For each board it contains five lines \begin{verbatim}#SID Unique ID 0015 0x08000002e2e22b28 @@ -23,7 +23,7 @@ The combination of serial number and unique ids is given in the file \filename{s 0013 0xb0000002e311b928 \end{verbatim} -The first three digits of the SID is the serial number as written on the board, the fourth digit is an identifier for the FPGA number as printed on the PCB (central FPGA is FPGA 5, the others are numbered 1 to 4, but mapped to 0 to 3 in the file). Based on this file, a second file \filename{addresses.db} can be written for each individual set-up to assign each board the necessary network addresses. +The first three digits of the SID is the serial number as written on the board, the fourth digit is an identifier for the FPGA number as printed on the PCB (central FPGA is FPGA 5, the others are numbered 1 to 4, but mapped to 0 to 3 in the file). Based on this file, a second file \files{addresses.db} can be written for each individual set-up to assign each board the necessary network addresses. \subsection{Flash Programming} @@ -126,7 +126,7 @@ The initial address set with \signal{Regio\_Init\_Address} can be chosen from th \item Check basic TrbNet functionality \item Program Flash ROMs via TrbNet \item Reboot Board to see if all FPGA boot from Flash - \item Add the five unique IDs to the \filename{serials\_trb3.db} in the cvs (see \ref{Trb3BoardID}) + \item Add the five unique IDs to the \files{serials\_trb3.db} in the cvs (see \ref{Trb3BoardID}) \item Add board as tested to wiki page \end{itemize*} diff --git a/trb3/main.pdf b/trb3/main.pdf index 7130710..6031194 100644 Binary files a/trb3/main.pdf and b/trb3/main.pdf differ diff --git a/trb3/main.tex b/trb3/main.tex index 66c0c6d..219b9cd 100644 --- a/trb3/main.tex +++ b/trb3/main.tex @@ -79,7 +79,7 @@ \author{Grzegorz Korcyl, Ludwig Maier, Jan Michel, Marek Palka, \\Manuel Penschuck, Pawel Strzempek, Michael Traxler, Cahit Ugur} -\newcommand{\filename}[1]{\textit{#1}} +\newcommand{\files}[1]{\textit{#1}} \newcommand{\signal}[1]{\textsc{#1}} \newcommand{\genericname}[1]{\textsc{#1}} \newcommand{\constname}[1]{\textsc{#1}}