From: hadaq Date: Sat, 10 Mar 2012 07:37:50 +0000 (+0000) Subject: *** empty log message *** X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=e0936da1b2bd1c3e5a237840152d4c1f857abffc;p=trb3.git *** empty log message *** --- diff --git a/tdc_releases/tdc_v0.0/README.txt b/tdc_releases/tdc_v0.0/README.txt new file mode 100644 index 0000000..1f5bfd6 --- /dev/null +++ b/tdc_releases/tdc_v0.0/README.txt @@ -0,0 +1,68 @@ +##----------------------------------------------------------------------- +## Implementation of TDC in FPGA +##----------------------------------------------------------------------- + + +--------------------------------------------- +## v0.0 10.03.2010 +## Cahit Ugur, HIM, Mainz +## ugur@kph.uni-mainz.de +--------------------------------------------- + +Contents: +--------- +bit_file/trb3_periph.bit +lpf_file/trb3_periph_constraints.lpf +prj_file/trb3_periph.prj +source/Adder_304.vhd +source/bit_sync.vhd +source/Channel.vhd +source/Encoder_304_Bit.vhd +source/Encoder_304_ROMsuz.vhd +source/FIFO_32x512_OutReg.vhd +source/Reference_channel.vhd +source/reset_generator.vhd +source/ROM_Encoder.vhd +source/ROM_FIFO.vhd +source/TDC.vhd +source/trb3_periph.vhd +source/up_counter.vhd +documentation/TDC_data_format.pdf +documentation/trb3_ctrl_stat_regs.odt + + +General Details: +---------------- +This is the first release of the TDC in FPGA. +The first channel (ch0) of the TDC is design as the reference channel. +The control-status registers map and the data format of the tdc can be found +in the documentation folder. + + +Version Details: +---------------- + +v0.0 10.03.2012 +- 8 channels are implemented. +- 2 transition wave union laucher is used for precise time measurements. +- Single edge (rising edge) is detected. +- ROM based encoder handles the conversion from thermometer code to binary +code. +- The register array (after the delay line) is designed as double +synchroniser. + + +Known Issues: +------------- + +v0.0 10.03.2012 +- The ROM table of the encoder has to be filled for bubble errors worse than 2 +bits. There are empty bins. +- The double synchroniser should be removed. + + +Changes: +-------- + +v0.0 10.03.2012 +- first release diff --git a/tdc_releases/tdc_v0.0/documentation/TDC_data_format.pdf b/tdc_releases/tdc_v0.0/documentation/TDC_data_format.pdf new file mode 100644 index 0000000..ea1467b Binary files /dev/null and b/tdc_releases/tdc_v0.0/documentation/TDC_data_format.pdf differ diff --git a/tdc_releases/tdc_v0.0/documentation/trb3_ctrl_stat_regs.odt b/tdc_releases/tdc_v0.0/documentation/trb3_ctrl_stat_regs.odt new file mode 100644 index 0000000..d3e62b2 Binary files /dev/null and b/tdc_releases/tdc_v0.0/documentation/trb3_ctrl_stat_regs.odt differ